FPGAs

Level Shifting Hot Swap Buffers Improve I2C & SMBus Standards

7th March 2008
ES Admin
0
Linear Technology has expanded its I2C and SMBus Bus Buffer and Rise Time Accelerator family with the introduction of the LTC4308 and LTC4309. As the number of plug-in boards continues to increase, additive capacitances begin to critically lengthen rise times. Breaking the bus into several pieces with bus buffers alleviates this problem, but if the buffer offsets are too large, logic low voltage specifications may be violated.
The LTC4308 is optimized for level translation down to 1V and introduces a negative offset voltage for buses with very low pull-up supplies, whereas the LTC4309 provides a low offset voltage, fault flag, enable disconnect, and accelerator disable. Both hot swappable 2-wire bus buffers prevent signal corruption during I/O card insertion into live backplanes and provide capacitive isolation per I2C and SMBus specifications.

The features of the LTC4308 and LTC4309 make them well suited for a variety of computing, networking and data storage systems that use multiple I/O cards with different supply and bus voltage levels. The LTC4308 provides automatic level translation from low voltage systems (down to 1V) to higher voltage systems (2.3V to 5.5V) using only a single supply pin. The LTC4309 has a second supply pin, allowing separate use of input and output bus pull-up supplies. Rise time accelerators provide strong, slew-limited pull-up currents that force the voltage to rise during positive transitions, ultimately resulting in reduced power consumption, improved logic low noise margins and the ability to design with higher bus capacitances beyond I2C limitations. In addition, a 30ms stuck bus timeout detects if SDA or SCL lines are stuck low so that the bus can be cleared and devices can be reset in order to resume proper system operation.

Although very similar in design, the LTC4308 targets busses that require low voltage level shifting while the general purpose LTC4309 supports a variety of additional features. The LTC4308’s -200mV output to input offset voltage allows communication with low voltage components on the input side, whereas the LTC4309’s 60mV output to input offset voltage supports cascading of multiple bus buffers for bus extension. In addition, the LTC4309 is equipped with a fault flag that indicates a stuck bus, an enable disconnect that enables/disables the circuitry that disconnects the bus under a fault condition and an accelerators disable that deactivates the rise time accelerators for less capacitively loaded buses. Both devices offer rugged ±6kV HBM ESD protection.

The LTC4308 and LTC4309 have a variety of ordering options. C and I versions offer different operating temperature ranges, from 0°C to 70°C and -40°C to 85°C, respectively. The industry-standard packages for the LTC4308 include an 8-lead 3mm x 3mm DFN and an 8-lead MSOP, while the LTC4309 is available in a 12-lead 4mm x 3mm DFN and a 16-lead SSOP.

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