Hot test topics tabled for discussion in Nuremberg

15th February 2016

Mick Elliott

0 0

Two hot board test topics will be discussed and demonstrated by JTAG Technologies at the Embedded World 2016 exhibition in Nuremberg (Feb 23-25). The Design for Testability (DfT) is the ‘Cinderella’ of the design process. Overcoming this challenge is not as exciting as designing and proving a new solution. Yet, DfT/testability should not be overlooked.

A design that addresses testability without requiring add-ons that compromise the original scheme is every bit as fulfilling as seeing the first prototype roll off the production line. After all, without adequate testability, that new assembly’s debut will be delayed by revisions and, possibly even, reworking.

Ideally, a new board design can be debugged using software tools completely before the first prototype is built. Unfortunately, though, we do not live in an ideal world and obscure design bugs tend to appear only after the hardware is built.

The reasons for testability challenges are many-fold and all are a consequence of advances in electronics design. The drive to miniaturise all designs, means that components are placed close together with fine-pitch interconnects and the latest chip-scale-packages (CSPs) do not make it easy to probe I/Os hidden beneath the component.

JTAG Technologies believes that only an integrated test strategy offers a solution and will shpw the latest Boundary Scan solutions at Embedded World.

Test engineers worry about the access to nodes of assemblies with ever increasing complexity is more and more difficult and results in reduced fault coverage.

JTAG Technologies’ main motto for the exhibition reads:Optimise your ATE with JTAG Technologies Inside —clients can take a look at the test possibilities that arise from the use of “JTAG TECHNOLOGIES INSIDE” and see the current test methods and possibilities from a different perspective.

The company will display the following highlights from their comprehensive ATE product portfolio:

- ICT, MDA or flying probe systems are quickly and easily upgraded with JTAG Technologies’ boundary-scan solutions.Special add-on cards and software integration suites enable users to benefit from the features of the combined systems.

- Traditional functional tests based on National Instruments’ LabView/TestStand, C++, .net and other programming languages often feature complex and time-consuming test programs.Easy access to assembly via boundary-scan pins can simplify existing test programs and ease diagnosis in case of faults.