Wind River Lifts the Lid off Symmetrical Multi-Processing at the UK Embedded Masterclass

23rd February 2010
Posted By : ES Admin
Wind River Lifts the Lid off Symmetrical Multi-Processing at the UK Embedded Masterclass
Engineers looking to work with multicore devices or exploit symmetrical multi-processing for embedded systems will be pleased to hear that both of these topics are central to this year's agenda at The Embedded Masterclass 2010, 6th and 11th May.
Paul Tingey of Wind River will present a half-day workshop that introduces engineers to the process of migrating an application running in single-core mode to run in SMP (symmetric multi-processing) mode, taking advantage of the multiple cores to gain an increase in performance.

Just like in the desktop and laptop arena, adoption of multi-core processors in Embedded Systems is becoming increasingly widespread, said Paul Tingey, the presenter of the SMP workshop. The advantages are well understood: a promise of higher performance, at a lower cost and within a smaller space budget.

However, this promise comes at the cost of higher complexity and, potentially, a longer and more complex development cycle. This is equally true when migrating an existing single-core application to a multi-core device. Such a migration effort is complex and engineers are required to understand how their code (which was almost certainly written for a UP system) will react when running on a multi-core system.

During this workshop engineers will have an opportunity to use Wind River's Workbench development environment to learn more about how multi-core systems differ from single-core systems and how to unlock the power of multiple cores and speed up their application through the use of a Symmetric Multi-Processing (SMP) operating system.

In addition to this workshop, German tools company Lauterbach promise live demonstrations of debug and trace capability on both an eight-core Mips system running in SMP mode and also trace and code analysis on a PIC32 processor. Also on their stand will be demonstrations with an Intel Atom system and an ARM multi-core chip from TI.

We will have a lot of expertise in this field at this year's event, said Richard Blackburn, the organiser. Multi-core and multiprocessor designs are becoming increasingly common in embedded systems, both to save space and to deliver more power. We are expecting this to be a very popular workshop, it is already attracting registrations.

Over 30 industry vendors have sponsored this year's event. Companies include Lauterbach, LDRA, IAR Systems, Phaedrus Systems, SDC Systems, Wind River, Green Hills Software, LDRA, MontaVista, QNX, Blue Chip Technology, IPL and Enea.

In addition to six half-day technical workshops, Embedded Masterclass includes a schedule of eight 40-minute technical presentations on assorted topics, and a vendor exhibition. Attendance at the exhibition, including the series of 40-minute technical presentations, is free to embedded engineers and technology managers. The half-day workshops are £95.00+VAT. Engineers are advised to register early, as space at the event is limited. Registration is on-line at

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