Design

TEWS TECHNOLOGIES Introduces 32 Channel M-LVDS FMC Mezzanine Module

15th March 2013
ES Admin
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TEWS today announced the TFMC684, an FMC (FPGA Mezzanine Card) Mezzanine Module complying with the ANSI/VITA 57.1 standard used to add a 32bit M-LVDS (Multipoint Low Voltage Differential Signaling) I/O Interface to FMC Carrier Cards.
Designed for high-speed data acquisition and generation, the TFMC684 is ideal for applications in process control, transportation, COTS, test and simulation.

The Low Pin Count FMC Connector provides 32 independent control signals which configure the direction of each M-LVDS Line Driver/Receiver.

The 32 data lines are routed as single-ended traces from the FMC Connector to the M-LVDS Transceivers where they are converted into 32 differential pairs meeting the TIA/EIA-899 standard (Type-2 Receivers). The 32 bits of differential I/O are connected to a VHDCI-68 Connector in the front panel.

On every of the 32 bits the TFMC684 supports signaling rates up to 200Mbit/s which means that a 100MHz clock can be transmitted or that 200M voltage transitions per second can be performed.

All signals connecting the M-LVDS Driver/Receivers with the FMC Carrier are powered by an adjustable voltage generated by the Carrier. Because of voltage translation devices on the TFMC684 this voltage can range from 1.2V to 3.6V which allows the FPGA's I/O cells to be configured for various different I/O standards.

The signaling standard reference voltage pin, which is powered by the TFMC684, provides half of the adjustable voltage generated by the carrier for I/O standards requiring a reference voltage.

A power good LED indicates whether all voltages on the TFMC684, which are provided by the FMC Carrier, are within limits.

The TFMC684 is equipped with an I²C EEPROM which acts as an IPMI resource requesting the value of the adjustable voltage, for example.

The TFMC684 operates from -40° to +85°C. In order to support long term programs, the TFMC684 have a 5 year warranty.

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