Design

Solution enables cache coherency for high performance SoCs

8th June 2017
Lanna Deamer
0

Synopsys has announced the availability of its complete DesignWare CCIX IP solution, consisting of controller, PHY and verification IP delivering data transfer speeds up to 25Gbps and supporting cache coherency for high performance cloud computing applications.

The Cache Coherent Interconnect for Accelerators (CCIX) standard allows accelerators and processors to access shared memory in a heterogeneous multi-processor system for significantly lower latency. In addition, CCIX leverages the PCI Express 4.0 line rates with extended speed modes to accelerate throughput up to 25Gbps for applications such as machine learning, network processing and storage off-load. The new DesignWare CCIX IP solution is built on Synopsys' silicon-proven PCI Express 4.0 architecture, which has been validated in over 1,500 designs and shipped in billions of units, enabling designers to lower integration risk, while accelerating adoption of the new standard.

"CCIX leverages the PCI Express protocol to support several line rates with additional high-speed 25Gbps option to address the need for higher bandwidth, lower latency and ease of programming in data centre applications," said Gaurav Singh, Chairman of the CCIX Consortium. "As a contributing member of the CCIX Consortium and with the availability of the DesignWare CCIX IP solution, Synopsys helps accelerate adoption of the standard and allows designers to deliver emerging data-intensive computing SoCs with a new class of interconnects."

Synopsys' interoperable CCIX controller, PHY and verification IP solution enables faster system integration. The RAS features in the DesignWare CCIX controller offer data protection and integrity in the datapath and Read Access Memory (RAM). In addition, debug capabilities, error injection and statistics monitoring give visibility into components such as Link Training and Status State Machine (LTSSM) and PHY equalisation process for a more comprehensive system testing. The CCIX PHY IP uses power management features such as I/O supply underdrive, V-Boost OFF and Decision Feedback Equalisation (DFE) bypass to significantly reduce power consumption. The PHY optimises performance across voltage and temperature variations and includes adaptive Continuous Time Linear Equaliser (CTLE), DFE and Feed Forward Equalisation (FFE) for superior signal integrity and jitter performance. Synopsys' Verification IP for CCIX includes configurable environments, complete port-level checks and system-wide coherency checks for rapid coherency verification.

"As the industry's most trusted IP provider for nearly two decades, Synopsys has consistently provided our customers with a broad portfolio of high-quality IP for emerging standards such as CCIX," said John Koeter, Vice President of Marketing for IP at Synopsys. "By providing a complete CCIX IP solution based on our silicon-proven PCI Express architecture that has been used by more than 250 companies, Synopsys enables designers to achieve the multi-gigabit performance and cache coherency requirements of their cloud computing designs with less risk."

Availability and additional resources
The DesignWare CCIX Controller, PHY and Verification IP for CCIX are available now.

For more information, click here.

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