Design

Reference design for imaging using time-interleaved SAR ADCs

18th October 2018
Alex Lynn
0

This reference design demonstrates how to achieve multiple ADC interleaving with high sampling rates and good resolution at low BOM-cost. The reference design was built with electronic imaging systems in mind. High definition imaging and other high speed signal processing applications require ADCs that can achieve high resolution, high SNR, high speed and low power consumption. 

These requirements cannot always be met with a single chip. By interleaving multiple SAR ADCs, the design optimises trade-offs between different ADCs in order to meet all of the system requirements.

Features

  • Resolution: 14-bit.
  • Input type: unipolar single-ended.
  • SNR > 73dB, ENOB: 12-bit, THD < -80dB.
  • Power: < 33mW.
  • Low latency compared to pipeline ADC-based solution.
  • Small form factor: 22x13mm.

To learn more, click here.

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