eSPI bus technology supports new computing with next-gen chipsets

30th May 2019
Posted By : Lanna Cooper
eSPI bus technology supports new computing with next-gen chipsets

 

Microchip has announced the first commercially available eSPI-to-LPC bridge. The ECE1200 bridge allows developers to implement the eSPI standard in boards with legacy LPC connectors and peripherals. This allows the developers to implement the eSPI standard while preserving large investments in legacy LPC equipment and substantially minimising development costs and risk.

Product longevity is critical in industrial computing equipment applications because of the significant upfront investment required.

The ECE1200 eSPI-to-LPC bridge allows developers to maintain long life cycles while supporting the eSPI bus technology that is required for new computing applications using the next generation of chipsets and CPUs. To reduce risk for developers, the eSPI bus technology has been through intensive validation for industrial computing applications and has been validated with processor companies.

Designed for today’s eSPI requirements, the ECE1200 detects and supports Modern Standby mode with low standby current. This helps industrial computing developers to manage operating costs and efficiencies, while maintaining the features end users expect from modern devices. The ECE1200 is simple to implement and does not require any software.

To streamline development, the ECE1200 comes with a BIOS porting guide, schematics and a layout guide. The ECE1200-I/LD is available today in a 40-pin VQFN package.


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