Synopsys, Inc. today announced the availability of the Time Division Duplex (TDD) mode in its Long-term Evolution (LTE) Model Library for physical layer system simulation. The addition of the TDD mode to the proven LTE Model Library enables developers of semiconductors for LTE network equipment and devices to quickly and reliably extend their designs to support this important version of the 3rd Generation Partnership Project (3GPP) LTE standard.

Synopsys, Inc. and Lattice Semiconductor Corporation today announced a multi-year extension of Lattice's OEM agreement for the Synopsys Synplify FPGA synthesis tools, which Lattice has been offering to its customers for more than 10 years. Under the terms of the agreement, Lattice Semiconductor will provide specific versions of Synopsys' Synplify Pro and Synplify software as part of its programmable logic design environments, including the recent...

Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that TSMC has successfully taped out a complex 28-nanometer (nm) Product Qualification Vehicle (PQV) test chip using Synopsys' Galaxy™ Implementation Platform. Key features used to design the PQV test chip include 28-nm design rule support for place-and-route, interconnect process modeling, IEEE 1801-2009 (U...

Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that Creative Chips, a mixed-signal semiconductor IC provider, has taped out its most complex mixed-signal chip to date using Synopsys' Galaxy™ Implementation Platform. The 180-nanometer (nm) CMOS industrial bus controller contains complex analog and digital blocks that were created using the Galaxy cell-bas...

Synopsys, Inc. (Nasdaq: SNPS) announced it will report results for the third quarter fiscal year 2010 on Wednesday, August 18, 2010, after the market close.

Synopsys and GLOBALFOUNDRIES, a leading provider of advanced semiconductor technology and manufacturing services, today announced an agreement to develop the Synopsys DesignWare SuperSpeed USB (3.0), USB 2.0, HDMI 1.4 Tx and Rx, DDR3/2, PCI Express(r) 2.0 and 1.1, SATA 1.5/3 Gbps and 6 Gbps, and XAUI PHY IP for GLOBALFOUNDRIES’ 28 nanometer (nm) “Gate First” High-k Metal Gate (HKMG) process technologies. The collaboration will enable mut...

Synopsys announced the addition of the DesignWare 96 dB Hi-Fi Audio IP in the 40-nanometer (nm) and 55-nm process technologies to its broad portfolio of high-quality audio IP solutions. Synopsys is the first IP provider to offer audio codecs, digital-to-analog converters (DACs) and analog-to-digital converters (ADCs) in these advanced processes. The DesignWare Audio IP portfolio offers performance levels from 80 dB to 103 dB and is available in ...

Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that Oticon taped out the digital signal processor (DSP) chipset for their next generation hearing-aid devices ahead of schedule using Synopsys' Design Compiler(tm) Graphical RTL Synthesis, a key component of the Galaxy(tm) implementation platform. Engineers at Oticon, a world leader in the design, development...

Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that Oticon taped out the digital signal processor (DSP) chipset for their next-generation hearing-aid devices ahead of schedule using Synopsys' Design Compiler™ Graphical RTL Synthesis, a key component of the Galaxy™ Implementation Platform. Engineers at Oticon, a world leader in the design, development a...

Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that Foveon Inc., a world innovator in the design and development of image sensors and image capture systems, has taped out its newest generation direct image sensor using Synopsys' Galaxy Custom Designer(r) solution. The Foveon X3(r) direct image sensor, used in high end consumer cameras such as Sigma's SD15 ...

Synopsys, Inc. (Nasdaq: SNPS) and Virage Logic Corporation (Nasdaq: VIRL) announced today that the 30-day waiting period under the Hart-Scott-Rodino Antitrust Improvements Act of 1976, applicable to Synopsys' proposed acquisition of Virage Logic, expired on July 19, 2010.

Synopsys announced that SVTC Technologies, the leading commercialisation service provider for new, emerging silicon based technologies, has chosen Synopsys’ manufacturing tool suite to enable its customers to reduce time to market for a wide variety of innovative products using CMOS processes, MEMS, photovoltaics and other related nanotechnologies.

Synopsys announced that Open-Silicon, a leading system-on-chip (SoC) design and semiconductor manufacturing company, has licensed and integrated 50 high-speed DesignWare® IP products into customers' chips with 100 percent first-pass silicon success. The IP products include complete solutions consisting of configurable digital controllers, PHYs which support leading process technologies from 180 to 28 nanometers, verification IP, as well as analo...

Synopsys announced today that the IEEE Industry Standards and Technology Organization (IEEE-ISTO) has been awarded Synopsys' Tenth annual Tenzing Norgay Interoperability Achievement Award for providing a platform for driving market acceptance, adoption and implementation of standardized technologies. IEEE-ISTO has provided an operational infrastructure to the global technology community for the development, adoption and certification of industry ...

Synopsys announced that Samsung Electronics' Foundry business (Samsung Foundry) has successfully taped out its first 32-nanometer (nm) system-on-chip (SoC) design using Synopsys' Galaxy™ Implementation Platform. Samsung Foundry selected the Galaxy Implementation Platform as one of its implementation solutions for its mobile application processor because the platform's seamless integration enabled them to meet timing while minimizing power consu...

Synopsys unveiled new PrimeTime HyperScale technology that enables static timing analysis (STA) to scale beyond 500 million instances. PrimeTime HyperScale technology provides design engineers the insight required to solve many of the timing integration and closure problems they face with today’s large system-on-chip (SoC) design flows while delivering a 5 to 10X boost in performance and capacity.

Synopsys announced it is delivering an optimized, pre-validated design environment for the Common Platform alliance (CPA) 32/28-nanometer(nm) high-k metal gate (HKMG) technology based on Synopsys' Lynx Design System.

Synopsys introduced its Galaxy Characterization Solution. The Galaxy Characterization Solution is a comprehensive suite of tools architected to generate compact, highly-accurate libraries for the design and implementation of complex system-on-chips (SoCs). Today's SoCs require libraries that contain hundreds of gigabytes of timing, power, noise and process variation data to ensure the chip meets all performance criteria. The Galaxy Characterizati...

Synopsys unveiled Rapid3D technology, a new 3D fast field solver engine fully integrated into Synopsys' StarRC™ Custom parasitic extraction solution. Building on the gold standard Raphael NXT engine, Rapid3D technology delivers attofarad accuracy and significant speedup by incorporating the latest advancements in 3D field solver algorithms. These algorithms take full advantage of modern multicore hardware to solve the accuracy and runtime chal...

Synopsys announced it has acquired technology, engineering resources and other assets of Synfora, Inc., a provider of C/C++ high-level synthesis tools used to design complex systems-on-chips (SoCs) and FPGAs. The asset acquisition strengthens Synopsys' position in system-level design and verification and enhances the company's FPGA-based prototyping solutions.