Cadence Design Systems has announced that Samsung Foundry has deployed the Cadence Spectre FX Simulator for FastSPICE-based verification of their large-scale analogue and mixed-signal IP on 3nm, 4nm and 5nm processes.

Cadence expands into molecular simulation with acquisition of OpenEye Scientific, a pioneering leader in computational molecular design the acquisition leverages Cadence’s computational software expertise into molecular modeling and simulation, focused on pharmaceutical and biotechnology drug discovery

Cadence Design Systems have announced that it has completed the acquisition of Future Facilities.

Cadence Design Systems has entered the digital twins arena by acquiring Future Facilities, a provider of electronics cooling analysis and energy performance optimisation solutions for data centre design and operations using physics-based 3D digital twins.

A custom electromigration and IR drop (EM-IR) solution that delivers improved ease of use with minimal tuning and enables the development of efficient, low-power ICs has been introduced by Cadence Design Systems.

Cadence Design Systems has announced Xcelium Apps, a portfolio of domain-specific technologies implemented natively on the Cadence Xcelium Logic Simulator kernel that enable automotive, mobile and hyperscale design teams to achieve the highest verification performance. By mixing and matching Xcelium Apps, customers can achieve up to a 10X regression throughput improvement.

Cadence Design Systems has announced it has extended its collaboration with Arm to accelerate mobile device silicon success using Cadence digital and verification tools and the Arm Total Compute Solutions 2022 (TCS22), which includes the Arm Cortex-A715 and Cortex-X3 CPUs and the Arm Mali-G715 and Immortalis-G715 GPUs.

Cadence Design Systems has announced that Cadence RFIC (radiofrequency integrated circuit) solutions are enabled to support TSMC’s N6RF Design Reference Flow and process design kit (PDK) to accelerate mobile, 5G and wireless innovation.

Cadence Design Systems has announced the Cadence Optimality Intelligent System Explorer, which enables multi-disciplinary analysis and optimisation (MDAO) realisation of electronic systems.

Cadence Design Systems has announced that it has become an Official Technology Partner of the McLaren Formula 1 Team. Through the multi-year partnership, McLaren has access to Cadence Fidelity CFD Software, which provides innovative aerodynamic prediction tools that can help accelerate the team’s path toward victory.

Cadence Design Systems, Inc. announced that the Cadence digital full flow achieved certification for the GlobalFoundries (GF) 12LP/12LP+ process platforms to advance the design of aerospace, hyperscale computing, AI, mobile and consumer applications.

Cadence Design Systems, ushered in a new era of performance and accuracy for multiphysics simulation with the launch of the Cadence Fidelity CFD Software, a comprehensive suite of computational fluid dynamics (CFD) solutions for multiple vertical markets, including automotive, turbomachinery, marine, aerospace and others.

Cadence Design Systems has unveiled the Cadence High-Speed Ethernet Controller IP family, which enables complete Ethernet subsystem solutions up to 800G along with Cadence SerDes PHY IP in 7nm, 5nm and 3nm process nodes.

Cadence Design Systems have announced the Cadence HeliumVirtual and Hybrid Studio, a platform that accelerates the creation of virtual and hybrid prototypes of complex systems.

The qualification was GF’s confirmation that Cadence’s Pegasus Verification System meets the rigorous accuracy and runtime targets that users require when focused on advanced GF nodes.

Cadence has announced that Picocom has deployed the Cadence Palladium enterprise emulation platform to accelerate the verification and pre-silicon software validation of its System-on-Chip (SoC) designs for 5G open Radio Access Network (RAN) applications. Using the Palladium Emulation platform, Picocom achieved faster hardware and software integration, experiencing an emulation speedup of 1,000 times when compared with RTL simulation.

Cadence Design Systems have announced that SGS-TÜV Saar has independently certified that Cadence Tensilica Xtensa processors with FlexLock capability meet the ISO 26262:2018 standard to ASIL-D, the highest level possible under the Automotive Safety Integrity Level rating. The functional safety certification spans from base microcontroller to high-performance DSP, each with a configuration option for FlexLock to provide increased random fault...

Cadence Design Systems has announced the delivery of the Cadence Cerebrus Intelligent Chip Explorer, a new machine learning (ML)-based tool that automates and scales digital chip design, enabling customers to efficiently achieve demanding chip design goals.

Presto Engineering, an ASIC design and outsourced operations provider, and Cadence Design Systems have announced a collaboration to broaden semiconductor package design solutions and expertise for high-performance system-in-package (SiP) development for the automotive and Industrial IoT markets.

Cadence Design Systems has announced that Sequans Communications has successfully adopted the Cadence Virtuoso RF Solution, including the Cadence Spectre X RF Simulator and Cadence EMX Planar 3D Solver, for high-frequency RF harmonic balance and electromagnetic (EM) analysis and signoff, to develop its next-generation 5G IoT platform.