Cadence Design Systems
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Cadence Design Systems Articles
SMIC Adopts Cadence DFM and Low-power Silicon Realization Technology for 65-Nanometer Reference Flow
Cadence Design Systems today announced that Semiconductor Manufacturing International Corporation (SMIC, NYSE: SMI and SEHK: 981), the largest semiconductor foundry in China, has adopted Cadence® Silicon Realization products for the design-for-manufacturing (DFM) and low-power technology at the core of SMIC’s 65-nanometer Reference Flow 4.1. Using Cadence Encounter Digital Implementation System as the foundation, the companies collaborated to ...
Cadence C-to-Silicon Compiler Supported in Fujitsu Semiconductor’s ASIC Flow for System Realization
Cadence Design Systems today announced that Fujitsu Semiconductor Limited now supports the Cadence® C-to-Silicon Compiler for high-level synthesis in ASIC design flows. C-to-Silicon Compiler is the only high-level synthesis tool that embeds production RTL synthesis--Cadence Encounter® RTL Compiler--to generate implementation-ready RTL for the target application. This delivers a predictable flow from transaction-level model (TLM) to GDSII, with ...
Cadence to Present and Showcase Technology at RTI's 3D Architectures for Semiconductor Integration and Packaging Conference
Cadence Design Systems today announced that the company will be presenting a paper and showcasing its technology at RTI's 3D Architectures for Semiconductor Integration and Packaging conference. The conference will be Dec. 8 to 10 at the Hyatt Regency San Francisco Airport Hotel in Burlingame.
Open-Silicon Achieves Ultra High Performance Using Cadence Silicon Realization Technology to Tape-Out Breakthrough 2.4 GHz ASIC Processor
Cadence Design Systems (India) Pvt Ltd., a subsidiary of Cadence Design Systems, Inc. (NASDAQ: CDNS), announced that Open-Silicon, Inc., a leading semiconductor company focused on ASIC design, develop-to-spec, and derivative ICs, has successfully taped out a breakthrough high-performance processor at over 2.4GHz under typical conditions utilizing the Cadence® Silicon Realization product line. Open-Silicon completed the entire design using Cadenc...
Cadence Unveils Holistic Approach to Silicon Realization
Cadence Design Systems, Inc. (NASDAQ: CDNS), a global leader in electronic design innovation, today introduced a new holistic approach to Silicon Realization that moves chip development beyond a patchwork of point tools to a streamlined end-to-end path of integrated technology, tools, and methodology. This approach represents a stark turn from the discrete and compartmentalized ways semiconductor and systems companies have traditionally achieved ...
Cadence and Xilinx Introduce FPGA IP Ecosystem Microsite
Cadence Design Systems, Inc. (NASDAQ: CDNS), a global leader in electronic design innovation, and Xilinx today introduced the new Xilinx IP Ecosystem microsite, a unified site meant to increase FPGA and ASIC designers’ visibility to the latest IP supporting the Xilinx programmable platform.. The microsite, developed as part of a broad initiative announced by Xilinx to transform and enable its ecosystem of third-party providers, is part of the C...
Cadence Offers Optimized Implementation Methodology for Silicon Realization of New ARM Cortex-A15 MPCore Processor
Cadence Design Systems today announced it is providing its customers an optimized implementation methodology for the new ARM® Cortex™-A15 MPCore™ processor that enables them to start designing Cortex-A15 processor-based SoCs immediately. As ARM developed the Cortex-A15 MPCore processor - its most advanced processor for mobile, consumer and infrastructure applications - Cadence® worked alongside the microprocessor IP leader to develop the me...
Sunplus Reduces Design Cycle on High-Speed Multi-Million-Gate SoC Using Cadence Encounter Digital Implementation System
Cadence Design Systems today announced that Sunplus Technology Co., Ltd. (TAIEX: 2401, LSE: SUPD), a leading multimedia IC design company, adopted the Cadence Encounter® Digital Implementation (EDI) System for its multimedia system-on-chip (SoC) designs.
SMIC Adopts Cadence Silicon Realization End-to-End Product Line for 65-40nm Design
Cadence Design Systems today announced that the most advanced foundry in Mainland China, Semiconductor Manufacturing International Corporation (“SMIC”, NYSE: SMI and SEHK: 0981.HK), has adopted the Cadence Silicon Realization product line for advanced node, low-power designs. The Cadence Silicon Realization product line is composed of tools essential to turning designs into silicon. It is a key element of its EDA360 (the new Electronic Design...
Global Unichip Boosts Design Productivity with Cadence Encounter Timing System
Cadence Design Systems today announced that Global Unichip Corporation (GUC) has adopted the Cadence® Encounter® Timing System to reduce time to final design closure efficiently in its Encounter Digital Implementation (EDI) System-based design flows. By adopting the integrated signoff solution, GUC is able to shorten lead time and reduce tapeout schedule risk for Silicon Realization.
Global Unichip Expands Portfolio of Cadence Technology to Speed IP Development
Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced that Global Unichip Corporation (GUC) has adopted Cadence® Virtuoso® custom design technologies to speed development of its high-speed interface IP. GUC also has adopted Cadence design for manufacturing (DFM) technologies for its advanced process node system-on-chip (SoC) designs.
Andes Technology Adopts Cadence Digital Front-End Low-Power Flow
Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced that Andes Technology, a Taiwanese provider of high-performance, low-power 32-bit processor IP and SoC platforms, has adopted the Cadence® digital front-end low-power design flow. The flow, based on the Common Power Format (CPF), deploys Cadence synthesis, simulation and formal verification technology. It enables Andes to provide its cus...
Cadence Aligns Workforce to Deliver on EDA360 Vision
Cadence Design Systems, Inc. announced today that it will align product development to deliver on the EDA360 vision. The company will line up research and development (R&D) around the three core tenets of the vision: System Realization, SoC Realization and Silicon Realization.
Fujitsu Adopts Cadence Encounter Conformal ECO Designer
Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced that Fujitsu Limited has adopted the Cadence® Encounter® Conformal® ECO Designer to cut costs and reduce design time in its engineering change order (ECO) implementation flow. The technology giant recently deployed the Cadence technology to tape out a network-control large-scale integration design of 40 million gates at a 65-nanometer ...
Cadence Reports Q2 2010 Financial Results
Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced results for the second quarter of fiscal year 2010. Cadence reported second quarter 2010 revenue of $227 million, compared to revenue of $210 million reported for the same period in 2009. On a GAAP basis, Cadence recognized net income of $49 million, or $0.19 per share on a diluted basis, including $67 million in acquisition-related income tax benefit, in the second quarter of 2010, comp...
Realtek Semiconductor Selects Cadence Design Systems as its Strategic EDA Solutions Provider
Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, announced today that it has signed an agreement with Realtek Semiconductor Corp., a leading IC design house in Taiwan, that establishes Cadence as Realtek's strategic electronic design automation (EDA) solutions provider.
Cadence QRC Extraction adopted by STMicroelectronics for 40nm Analog/Mixed-Signal Design
Cadence today announced that STMicroelectronics, a global leader in integrated circuits for communications, consumer, computer, automotive and industrial applications, has standardised on Cadence QRC Extraction for their 40-nanometer custom/analog designs. A key component of the Cadence digital and analog/mixed signal design flow, QRC Extraction enables faster turnaround time, scalability through its multi-core backplane, increased accuracy to si...
Cadence Global Services Enables Industry's First TD-LTE Baseband Chip from Innofidei
Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced that Innofidei Inc., a leading mobile chipset provider based in Beijing, China, has successfully taped out the industry’s first long-term evolution time division duplex (LTE-TDD, or TD-LTE) baseband chip supporting a bandwidth of 20MHz for the next-generation TD-CDMA wireless communications protocol. The TD-LTE design achieved first-pas...
Cadence Completes Acquisition of Denali
Cadence Design Systems, Inc. (Nasdaq: CDNS), a leader in global electronics design innovation, today announced that it has successfully completed the acquisition of Denali Software, Inc., a Sunnyvale, Calif.-based provider of electronic design automation (EDA) software and intellectual property (IP).
Cadence Announces Comprehensive SOI Design Hub
Cadence introduced the Cadence SOI Design Hub, a new Web portal that lowers the barriers to adopting silicon-on-insulator (SOI) technology through comprehensive silicon-proven design enablement solutions and services. The SOI Design Hub is aimed at reducing SOI adoption start-up costs, cutting time to market for SOI intellectual property (IP), and improving design quality.