XMC FPGA modules scan radar, datacoms applications

1st October 2014
Source: Pentek Inc
Posted By : Mick Elliott
XMC FPGA modules scan radar, datacoms applications

Pentek has unveiled the newest members of its Onyx family of high-speed data converter XMC FPGA modules: the 3-channel Onyx Model 71721 and the 4-channel Onyx Model 71761, 200 MHz 16-bit A/D XMC modules based on the high density Xilinx Virtex-7 FPGA. Each has a programmable digital down converter and a suite of built-in programmable cores

Each module has a front end A/D converter stage that accepts three (Model 71721) or four (Model 71761) analogue HF or IF inputs on front panel SSMC connectors, with each transformer-coupled to Texas Instruments ADS5485 200 MHz, 16-bit A/D converters.

The 200 MHz sampling rate handles the needed bandwidth for a wide range of signal processing applications. The Model 71721 also includes a two-channel 16-bit 800 MHz D/A converter.

The Model 71721 and Model 71761 come preconfigured with a suite of built-in functions for digital down conversion, data capture, synchronisation, time tagging, and formatting, making them ideal turn-key interfaces for radar, communications, or general data acquisition applications. An A/D acquisition IP module is included for easy data capture and delivery to system memory.

Both modules feature a complete beamforming subsystem. The DDC core contains programmable I & Q phase and gain adjustments followed by a power meter that continuously measures the individual average power output. The time constant of the averaging interval for each meter is programmable up to 8K samples.

The power meters present average power measurements for each DDC core output in easy-to-read registers. A threshold detector automatically sends an interrupt to the processor if the average power level of any DDC core falls below or exceeds a programmable threshold.

A programmable summation block sums any of the four DDC core outputs, with a power meter, threshold detector and a programmable gain stage to compensate for bit growth. The sum can be selected for output across PCIe. Alternatively, for larger systems, local sums from several boards can be aggregated via a built-in Xilinx Aurora gigabit serial interface, daisy- chained through the P16 XMC connectors.

The Model xx721 also includes a waveform generation IP core and a programmable interpolation filter to support digital upconversion within the D/A.

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