IC validator certified by GLOBALFOUNDRIES for physical verification

15th May 2018
Posted By : Enaie Azambuja

Synopsys, Inc. has announced that GLOBALFOUNDRIES (GF) has certified the Synopsys IC Validator tool for physical signoff on the GF 14LPP process technology. With this signoff certification, designers can take advantage of IC Validator's speed and scalability, while ensuring a high level of manufacturability compliance and maximum yield. The certified runsets, including DRC, LVS, and metal fill technology files, are available from GF.

"Signoff certification of IC Validator is an essential step in supporting our mutual customers for physical signoff," said Jai Durgam, vice president, Customer Design Enablement at GLOBALFOUNDRIES.

"Synopsys worked closely with us on an extensive tool certification and runset qualification for IC Validator on our 14LPP process technology. Our foundry customers can now use IC Validator's fast analysis to maximise the high-performance and power efficiency benefits of our 14LPP process technology. In addition, we are actively working to expand IC Validator signoff verification for all of our advanced processes."

IC Validator, a key component of the Synopsys Design Platform, is a comprehensive and highly scalable physical verification tool suite including DRC, LVS, programmable electrical rule checks (PERC), dummy metal fill, and DFM enhancement capabilities.

IC Validator is architected for high performance and scalability that maximises utilisation of mainstream hardware, using smart memory-aware load scheduling and balancing technologies. It uses both multi-threading and distributed processing over multiple machines to provide scalability benefits that extend to more than a thousand CPUs.

"Manufacturing complexity at advanced nodes challenges designers to deliver within schedule," said Christen Decoin, senior director of business development, Design Group at Synopsys.

"Our close collaboration with GLOBALFOUNDRIES ensures designers have timely access to performance-optimised runsets. The runsets, in concert with IC Validator's massively parallel architecture's scalability, provide designers a fast and accurate path to physical signoff closure."


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