Barco delivers its JPEG 2000 IP cores on all 40nm FPGA platforms

Barco Silex, Barco's center of competence for embedded video coding electronic and design services, announces the support of its JPEG 2000 IP cores on all high-performance and low-cost 40nm FPGA families. Barco Silex, announces the support of its acclaimed JPEG 2000 IP cores on all FPGA families using 40/45nm process nodes for both high-performance and low-cost applications.

“The introduction of 40nm FPGAs is very exciting for JPEG 2000 applications in the broadcast market”, said Théodore Marescaux, Video Business Manager at Barco Silex. “Thanks to the greatly increased densities, integration of rapid serial interfaces and reduced power consumption, FPGAs offer a cost-effective alternative to JPEG 2000 ASSPs and bring high flexibility to broadcast equipment manufacturers to differentiate on their JPEG 2000 compression based applications.

Broadcast applications of JPEG 2000 have widely varied requirements, ranging from single channel to complex multi-channel implementations and including high frame-rate and sub-frame latency applications. Nonetheless they typically come in two flavors: they have either high-performance requirements or need to satisfy stringent costs. The good news is that with the bleeding edge 40 nm FPGAs, customers have the choice between high performance and low cost devices.

Barco Silex is a long-time partner of both major FPGA vendors, and as such it is only natural to optimize our JPEG 2000 IP cores for the newest families of 40nm FPGAs, namely the Altera Stratix® IV and Xilinx Virtex®-6 devices for high performance applications and the Altera Arria® II GX and Xilinx Spartan®-6 devices when cost-effectiveness is the name of the game”.

“The broadcast market has very specific needs”, commented Laurent Petit, Product Manager at Barco Silex. “Therefore our leading-edge JPEG 2000 IP cores are tailored to hit the sweet-spot between implementation effectiveness and outstanding quality/performance for broadcast applications.”