Test & Measurement

Test system upgrades impedance control on high-speed pcbs

1st September 2014
Mick Elliott
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Polar Instruments will preview its next-generation CITS880s Controlled Impedance Test System (CITS) at PCB West 2014 in Santa Clara, California (Sept 10).  The system introduces Launch Point Extrapolation (LPE), enabling PCB fabricators to improve impedance control for the latest high-speed PCBs which use finer trace widths and thinner coppercompared to conventional boards.

The increased accuracy and repeatability of the instantaneous impedance measurement, allows PCB fabricators to ensure optimum impedance control and manufacturing yields for complex PCB builds.

LPE is a line-fit technique deployed on thinner traces which exhibit significant slope arising from DC and AC resistance along the trace. LPE “projects the impedance back” to a point close to the start of the trace where the influence of the DC and AC resistance on the measurement is minimal.

Using the test system in conjunction with 2D field solvers such as the Polar Si8000m, or Speedstack PCB, can yield a significant improvement in the correlation between measured and modelled impedance.

The system design focuses on further optimising pulse flatness. This, together with Polar’s latest robust high-speed IPS probes, means that fabricators can now test trace lengths two to three inches shorter than the minimum length imposed by previous generation CITS.

For additional flexibility in high-volume applications, it can output reports using CITS DRG Pro report generation software as well as directly outputting results in an Excel-compatible format. Forward compatibility and an easy step-by-step guide will help users to update legacy CITS test programs for use on the test system.

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