Test & Measurement

Multitest Engineers to Hold Tutorial during BiTS 2011

9th February 2011
ES Admin
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Multitest, a designer and manufacturer of final test handlers, contactors and load boards used by integrated device manufacturers (IDMs) and final test subcontractors worldwide, announces that Ryan Satrom, RF Engineer, and Jason Mroczkowski, RF Engineering and Product Manager, will hold a tutorial titled “Signal and Power Integrity in the Test Interface” at the upcoming Burn-in & Test Socket Workshop, scheduled to take place March 6-9, 2011 at the Hilton Phoenix East/Mesa Hotel in Mesa, AZ. The presentation will be held during the Tutorial Day, which will take place Sunday, March 6, 2011 at 3:30 p.m.
/> The semiconductor test cell is a complicated environment that creates challenges for the transmission of electrical signals. The resources necessary to power and verify device functionality require large handling and testing equipment. Signals from the test equipment must travel long distances and through a variety of interfaces to reach the device. Slow speed signals with minimal loading can be sourced from a distance, but high speeds and high power must be supported near the device. This requires an intelligently designed interface that pays close attention to signal and power integrity.

The comprehensive SI/PI workshop focused specifically on ATE will present an introduction to power integrity, including critical concepts such as equivalent series inductance and PDS impedance. These concepts then will be applied to the semiconductor test cell environment, providing insight to when power integrity must be considered and how the test interface can be optimized to meet device requirements.

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