Test & Measurement

Kannan Sadasivam and Sachin Gupta Weigh In on Weigh Scales

8th November 2012
ES Admin
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As one of the most precise analogue instruments in everyday circulation, digital weigh-scales are used in many different ways. However the complexities that arise when measuring weight can cause a number of problems when designing such a sensitive piece of equipment. By Kannan Sadasivam, Staff Applications Engineer with Cypress, and Sachin Gupta, Senior Applications Engineer at Cypress.
The most common scale design uses a resistive load cell configured as a Wheatstone Bridge. However, the sensor interface is complex due to precision requirements, and in the load cells the signal levels are low and the effect of noise is prominent.

Additionally, a weigh-scale system is not just about configuring an analogue front end (AFE) capable of providing high accuracy measurement; it also needs many other things such as a clear user interface and boost circuitry to deal with low battery conditions.

Figure 1 shows the basic arrangement of an analogue front end for weigh-scale applications. In this arrangement, the output of the transducer is first amplified, followed by a filtering stage to remove noise due to power supply and mechanical vibrations. This filtered output is then sampled by a high resolution ADC.

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Figure 1: An analogue front end for a weigh-scale application

Load cells are essentially resistive sensors which provide a ratio-metric voltage corresponding to the load applied to them. Figure 2 is a full bridge arrangement for a load cell (also known as fully active as all the arms have strain gauges and contribute towards the change in output) in which two strain gauges have a positive change to tension whereas the other two have a positive change to compression. Thus, when a load is applied on the sensor, two of the sensors increase their resistance while the other two decrease. This change in resistance causes an imbalance in the bridge, thus providing a differential output corresponding to the weight placed.

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Figure 2: Full bridge load cell configuration

Based on its construction, material and design, load cells tend to have certain parameters associated with them. It is absolutely necessary to understand these parameters before designing a load cell interface.

Sensitivity (Rated Output) is one of the most important parameters of a load cell. The sensitivity of a load cell is defined as full load output voltage in relation to the excitation voltage. It is generally expressed in mV/V. This value corresponds to the voltage deviation caused by the load cell at full load when excited by a 1V source. The sensitivity of load cells is very low (generally about 2mV/V). If a system has a 3.3V excitation voltage then at full load, the output voltage will be 6.6mV. It makes the requirement for a high precision ADC mandatory while dealing with load cells.

Load cells being mechanical devices, they have their own non-linearity based on their construction. A typical non-linearity of a load cell is about 0.015% of the rated output, which is approximately one bit when the ADC is sampling at 13 bits. However, one has to bear in mind that this is just one component of non-linearity contributed by the load cell in the complete system. The measurement system and analogue front end would have their own contributions into the systems’ total non-linearity as well.

The third parameter to take into account is hysteresis error, which is seen as the change in load cell output when a known load is reached from a lesser weight as compared to when it is reached from a higher weight. This is caused due to deformation properties of the material used in construction of the load cell. A higher weight may temporarily deform the load cell that effectively adds a small offset, which would show up when the target was reached from a higher weight.

Repeatability defines the change in the load measured by the load cell when the same weight is placed multiple times on the same load cell. Finally, creep is the measure of change in measured weight over time, such as when a weight is placed on a scale for a long period of time. Cheaper materials can result in very large creep values and it may take a long time for the load cell to recover from the deformation.

Resolution

Most weigh-scale designers would identify two different resolutions – the display resolution and the internal resolution. The display resolution is the resolution of the end result displayed by the weigh-scale. The internal resolution is the actual resolution on the internal analogue front end.

Consider a weigh-scale in which the load cell excitation voltage is 5V. In this case, its output voltage will be 0-10mV with a 2mV/V sensitivity. If the weigh-scale has to be designed for a resolution of 5grams and a total range of 10kg, the weigh-scale’s display resolution will be 1:2000. As mentioned earlier, in weigh-scales display resolution is different from internal resolution, and it is standard practice to have internal resolution about 20-30 times of display resolution. So, for this weigh-scale, the internal counts needed will be 1:60000. This corresponds to a 16-bit internal resolution.

The design would have to resolve the 10mV range of input with a 16-bit resolution. To measure this 10mV full range output, the most commonly used method is to implement a gain stage to gain the input signal to fit the ADC’s input range, as shown in Figure 1, thus resolving more bits inside a smaller range. For example, to have a measurement range of 10mV as discussed earlier using an ADC that has a 1V range, the user can resort to getting close to 100x gain on the signal using an amplifier-based gain stage.

Now consider an ADC with 20-bit resolution and an input range of 1V. The minimum input change this ADC can is resolve is 1μV. When we use a gain stage to amplify the signal prior to applying the signal to the ADC to improve the range to 0-10mV, the lowest resolved voltage would be as small as 10nV. This kind of resolution would place us deep inside the noise domain. The gain stage amplifies the noise as much as it amplifies the signal. This noise renders a considerable number of bits of the ADC as unusable and thus reduces the effective number of bits (ENOB). Thus, designers have to pick an ADC which gives an optimum ENOB for the required gain settings.

The most commonly used ADC to measure load cell’s output is a Delta Sigma (DelSig) ADC. This ADC relies on the technique of oversampling the signal and later decimating it to achieve high resolution. This architecture means the ADC has an inherent low pass nature which helps in reducing the effects of noise.

Gain

Having a very good ADC only solves one half of the puzzle. The gain stage is another requirement. Most designs use an external low noise amplifier for this purpose. But there are some devices in the market now, like Cypress’s PSoC3 and PSoC5, that implement this gain stage in the ADC’s input stage itself. The way this is achieved in the PSoC is by having an integrated input buffer in the ADC’s input that can achieve up to 8x gain. The ADC itself is capable of having a gain of up to 16x in its modulator stage.

As no external amplification stage is needed, such ADCs can provide about 18 effective number of bits since noise due to external amplifiers does not come into play. But for a weigh-scale application, resolution requirements are generally defined in terms of peak-to-peak resolution. This is the effective resolution calculated for a system after taking out the effect of the noise as a peak-to-peak value.

The general requirement for a commercial market space is 16-bit peak-to-peak resolution. This resolution would have to be achieved while measuring a full range of 10mV. The major concern would be dealing with system noise, thus bringing down the effective resolution.

Another major concern in a load cell interface is that it is prone to gain error because of how the output signal range is dependent upon the excitation voltage. Any variation in the excitation voltage can cause a similar percentage of gain error in the measurements. This can be avoided if the signal measurements are made as a ratio against the excitation voltage. This can be achieved in two ways, as follows.

The signal and excitation voltage can be measured separately and then the ratio calculated, thus taking out the gain error. However, this method requires multiplexing of the ADC between the two signals. The other problem with this approach is that the signal we are measuring is in the 10mV range and the excitation voltage would be in the Volts range. This would mean dynamically changing gain settings and ADC range parameters, something which might not be advisable in most analogue systems. In addition, changing these parameters dynamically would raise questions of mismatch of the two independent measurements made.

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Figure 3: Load cell interface circuit for ratio-metric measurement

As shown in Figure 3, the other means of achieving this is by using the reference to the ADC itself. ADCs generally have a reference pin to connect to an external reference. The input range of the ADC is defined as a factor of the reference voltage. Thus, every measurement made in the ADC is made with respect to the reference. If we provide the excitation voltage or a divided derivative of it as a reference to the ADC, we can achieve a ratio-metric measurement for the signal. Since load measurement in the load cell is a ratio of resistors, this approach fits the picture the best. Also, any variations in the excitation voltage would be unnoticed in the measurements since the ADC reference is also affected in the same way.

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