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Silicon Labs Introduces High Performance Synchronous Ethernet Clock IC

18th December 2008
ES Admin
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Silicon Laboratories has introduced the Si5315, a jitter-attenuating clock multiplier IC that meets or exceeds the performance, integration, frequency and jitter requirements for the 1G and 10G Synchronous Ethernet (SyncE) market. The Si5315 is the industry’s only SyncE clock multiplier IC to support 10G line encoding rates (161.13 MHz) in addition to SONET/SDH and Ethernet frequencies.
The device requires no external phase-locked loop (PLL) components, dramatically simplifying line card design and frequency translation in carrier Ethernet switch routers (CESR), wireless backhaul, 3G/4G base stations, multi-service access platforms, passive optical networking, IP DSLAM and T1/E1 infrastructure.

As service providers upgrade legacy circuit switched networks to more cost-effective carrier Ethernet/IP networks, communications equipment suppliers face challenges when translating between legacy SONET/SDH and Ethernet clock frequencies. Existing SyncE clock ICs and voltage-controlled crystal oscillator-based module level solutions are limited by a combination of poor jitter performance, limited frequency flexibility and lack of integration, which ultimately make these traditional solutions difficult to use.

The Si5315 provides the lowest jitter of any SyncE clock IC in the industry at less than 0.6 ps rms phase jitter, meeting the jitter requirements specified by ITU-T G.8262 and providing significant margin to Gigabit Ethernet (GbE) and 10 GbE PHY jitter requirements. The Si5315 achieves this level of performance by leveraging Silicon Labs’ patented DSPLL technology to integrate all key components of a high-performance analog PLL on chip, thereby providing excellent immunity to system noise sources. For ease of use, the Si5315 generates more than 200 of the most popular frequency translations required in SyncE line card applications, simplifying design and reducing BOM cost and complexity.

“Current SyncE solutions are incomplete because they do not provide the breadth of frequencies and jitter performance to fully meet 10G requirements,” said Dave Bresemann, vice president of Silicon Labs. “Silicon Labs’ solution provides an unprecedented level of frequency flexibility, integration and performance, simplifying design and lowering costs for our customers.”

In addition to this new family of SyncE clocks, Silicon Labs offers an expansive portfolio of frequency flexible, low jitter any-rate clock generators and buffers, jitter attenuating clock multipliers, XO/VCXOs, and silicon oscillators. These products use optimized DSPLL and MultiSynth technology to shorten lead times and deliver outstanding jitter performance for datacom, telecom, wireless, broadcast video, test and measurement, and consumer markets.

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