Pending

Analog Devices’ 16-bit Dual ADC Uses Half The Power Of Competing Data Converters, While Achieving Lowest Noise Performance In Its Clas

2nd August 2010
ES Admin
0

ADI announced a dual, 16-bit 105 MSPS (mega samples per second), low-power, low-noise, ADC (analogue-to-digital converter) designed for high-performance data acquisition systems in medical imaging, industrial, spectrum analysis, multimode radio and radar applications. The AD9650 ADC consumes 328-mW per channel, which is half the power per channel of competing data converters while achieving an industry best SNR (signal-to-noise ratio) figure of 82 dBFS and SFDR (spurious-free dynamic range) performance of 90 dBc with a 30 MHz input. For more information, visit http://www.analog.com/pr/AD9650.

“In the medical imaging arena, our customers are constantly striving for higher resolution image capture that improves patient diagnostics,” said Patrick O’Doherty, vice president for the Healthcare Group, Analog Devices. “The AD9650 helps our customers achieve that goal by allowing medical equipment designers to increase imaging channel densities while still maintaining system-critical low noise and power requirements.”

Available in a compact 9 mm x 9 mm package, the AD9650 provides flexibility for engineers using proprietary differential inputs at frequencies up to 300 MHz and includes an on-chip dither option for improved SFDR performance with low signal level analogue inputs. The new ADC is pin-compatible with ADI’s previously released dual ADCs, including the AD9268 16-bit 125 MSPS, AD9251 14-bit 80 MSPS and AD9269 16-bit 80 MSPS converters, allowing system engineers to raise the performance of their data acquisition systems without changing the board layout.

The AD9650 operates from a single 1.8-V supply and a separate digital output driver supply, accommodating 1.8-V CMOS or LVDS outputs. The AD9650 is also available in speed grade options of 80 MSPS, 65 MSPS and 25 MSPS.

AD9650 Key Features

* 105/80/65/25 MSPS sample rates
* 16-bit resolution
* SNR: 82 dBFS at 30 MHz and 105 MSPS
* SFDR: 90 dBc at 30 MHz and 105 MSPS
* Low power: 328 mW/channel at 105 MSPS
* Optional on-chip dither
* 1.8-V analogue supply operation

As part of a complete signal chain, the AD9650 can be used with amplifiers, VGAs and clock drivers such as the ADL5562 3.3 GHz ultralow -distortion RF/IF differential amplifier, ADA4937-2 ultralow -distortion differential ADC driver, AD8372 programmable dual VGA, AD9510 clock distribution IC and AD9520 CMOS output clock generator with integrated VCO.

Product Spotlight

Upcoming Events

View all events
Newsletter
Latest global electronics news
© Copyright 2024 Electronic Specifier