Mixed Signal/Analog

TI introduces wide-bandwidth, low-power, 12- and 14-bit data converters

13th October 2008
ES Admin
0

Texas Instruments has introduced six 12- and 14-bit analog-to-digital converters (ADCs) with sampling rates as high as 250 MSPS (mega samples per second) to deliver a premium combination of wide signal bandwidth, high dynamic performance and low power consumption, enabling more efficient power amplifier linearization in digital pre-distortion (DPD) solutions, better range and sensitivity in radar and defense electronics and greater accuracy in high-speed test and measurement equipment.


With 14-bit performance, the ADS6149 is the highest resolution 250-MSPS ADC in production, providing designers with maximum performance along with low power consumption. The ADS6149 and buffered input ADS61B49 offer the industry’s highest dynamic performance at 250 MSPS with greater than 70 dB signal-to-noise ratio (SNR) and 80 dB spurious-free dynamic range (SFDR) for input frequencies ranging from DC to 250 MHz. At the maximum sample rate of 250 MSPS, the ADS6149 consumes only 687 milliwatts (mW). At a sample rate of 150 MSPS, with dynamic power scaling, the device consumes as little 490 mW.

“The device’s low power consumption allows our new generation of wireless and radar receivers to realize high channel density with high performance. This translates into reduced system cost and enables new applications that require tight integration of multiple channels with signal processing on a single card,” said Dan McLane, co-founder of Innovative Integration.

The complete ADS61xx family of devices is highly flexible, which makes it easier for designers to maximize performance for their specific application. A 1- to 6-dB programmable gain option allows customers to optimize SNR, SFDR and input swing based on the unique needs of their application. For instance, designers can maximize SNR to enhance linearization effectiveness in DPD solutions, while SFDR can be increased and input drive reduced to improve small-signal analysis in defense and radio receiver applications. To further enhance flexibility, the ADS61B49 and ADS61B29 ease analog front end design by incorporating a fully differential input buffer. This buffer provides constant input impedance over input frequency and eliminates kickback from the ADC’s track-and-hold circuit to ensure consistent linearity of the signal. And to provide a flexible digital interface, the ADS61xx family of devices features user-selectable parallel CMOS or differential double data rate (DDR) LVDS output options.

TI offers a wide variety of devices to complete the signal chain, including those listed below to maximize performance, ease design and speed time-to-market. The devices are pin-compatible with previous-generation high-speed devices including the ADS5547/27.

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