The advantage of having such high-performance converters in standard CMOS process technology is that it allows for their integration on a single die together with a complex DSP and high-speed serial OTN framer interfaces to form a 100Gbps DP-QPSK transceiver. For such a device with 4 ADC and 4 DAC channels running at 65GSa/s, the sheer volume of data (2 Tbps) being converted to and from the analogue to the digital domain dictates a single die solution. For transmission to the optical line, the use of high-speed, high resolution DACs instead of standard digital interfaces offers a number of advantages. Management of skew among the four signal component lanes is done in the digital domain allowing precision control that is very stable across processing, temperature or voltage variations in the transceiver device. Signal processing in the digital domain allows for compensation of non-linearities in the transmit optics chain, as well as mitigating signal reflections at the device IOs. Integration of the 4-channel DAC into a transceiver device also removes the requirement for a separate multiplexer/encoder device.
For optical transport systems that will support higher data rates (e.g., 400Gbps), higher order modulation schemes are likely to be employed. The Fujitsu 65GSa/s DAC in 40nm and subsequent data converters in development, with even higher sampling rates and in smaller process nodes, are key technology enablers for these next-generation systems. As well as providing a viable roadmap for next-generation long-haul optical transport systems, Fujitsu’s family of high-speed DACs and ADCs also supports product applications in areas such as test and measurement, optical access and very high speed short-range interconnect.
“We are immensely proud of the achievements Fujitsu has made so far in bringing a portfolio of leading-edge CMOS solutions to the market to allow widespread, real-world deployment of single wavelength 100Gbps systems”, said Manfred Mettendorff, Director of the Communications Business Unit at FSEU. “With a centre of excellence for analogue and mixed-signal technology, supported by a global design team, we continue to push the technical limits in our offerings for high-speed converters and data interfaces. This effort not only underpins refinements in the current generation of 100Gbps systems, such as broader feature sets and power optimisations for smaller form factors, but will also enable 400Gbps transport rates and beyond”.
In addition to providing advanced mixed-signal IP blocks for complex IC developments for 100G systems, Fujitsu brings together key skills such as design techniques for digital power optimisation and advanced package development including techniques for enhanced thermal performance, noise isolation and signal routing. Fujitsu boasts a strong track-record in meeting critical time-to-market schedules for complex 100G system IC developments while continuing the commitment to provide a roadmap for more advanced applications.
A development kit for the 65GSa/s DAC will be available from November 2011 for customers to evaluate their modulation and FEC algorithm performance and to facilitate system prototyping. Development kits for the 65GSa/s CHAIS ADC are currently available from Fujitsu Semiconductor.