Memory
Smart storage adapters interoperate with management firmware
Data centre administrators and IT managers want the ability to securely manage and trouble-shoot platforms and devices remotely, which requires that additional software, hardware and firmware be interfaced with storage adapters and other server components.
XR-DIMM DRAM module with RTCA DO-160G certification
Apacer has announced the release of the XR-DIMM. This rugged memory module claims to be the first on the market to meet the exacting standards of the US RTCA DO-160G test, an aviation equipment certification that marks the XR-DIMM as resistant to high levels of vibration and therefore well suited for defence and aeronautical applications.
Portfolio of advanced memory and SerDes PHYs on TSMC N7 process
Rambus has announced a broad portfolio of high-speed memory and SerDes PHYs for next-generation applications on TSMC’s industry-leading N7 process technology. Rambus offers GDDR6, HBM2 and 112G LR PHY IP available for licensing, these solutions enable demanding applications for data centre, networking, wireless 5G, HPC, ADAS, AI and ML.
Support slashing flash programming times
Newly released support for Microsemi FPGAs and SoCs on ASSET InterTech’s ScanWorks can decrease programming times for SPI flash memory devices to the point where inline programming on the assembly line will not disrupt the manufacturing beat rate. ASSET InterTech is a leading supplier of JTAG-based software and hardware debug, validation and test tools.
Pinpoint accuracy with 3D NAND Flash optimisation
NAND Flash has become a mature technology, and the varieties of formats that are now available are already adopted in many industrial applications. However, with the desire to go beyond the standard options, Apacer has developed certain optimisations of NAND Flash technology.
Troubleshooting DDR3 memory interfaces
When designing circuits with DDR3 SDRAM modules, developers need solutions for checking the signal integrity on high-speed data lines. The new R&SRTO-K91/ R&SRTP-K91 oscilloscope option offers several tools - decoding of read and write cycles, display and analysis of eye patterns, and automated compliance testing for the DDR3, DDR3L and LPDDR3 standards.
HyperRAM addresses new AIoT application needs
With the rapid rise of automotive electronics, industrial 4.0, and smart home applications, new IoT edge devices and human-machine interface devices will require new functionality in terms of size, power consumption, and performance. In view of this, many MCU suppliers are developing new-generation MCUs with higher performance and lower power consumption to meet the market demand.
Fast flash programming tool eliminates production delays
Newly released support for Microsemi FPGAs and SoCs on ASSET InterTech’s ScanWorks can dramatically decrease programming times for SPI flash memory devices to the point where inline programming on the assembly line will not disrupt the manufacturing beat rate.
Hardware latencies associated with PRU-initiated memory reads
The PRU is a scalar processor, processing each instruction sequentially. With the exception of memory read instructions, all PRU instructions execute in a single cycle. However, the execution time of PRU read instructions varies based on memory access latencies.
Improved performance with high-speed CMOS DDR4 SDRAMs
Alliance Memory has announced that it has expanded its product offering with a new line of high-speed CMOS DDR4 SDRAMs. For improved performance over previous-generation DDR3 devices, the 4Gb AS4C256M16D4 and AS4C512M8D4 offer lower power consumption and faster data transfer rates in 96-ball and 78-ball FBGA packages.