Memory

1Gb, 2Gb & 4Gb SDRAMs launched in FPGA packages

27th June 2014
Staff Reporter
0
Datasheets

Alliance Memory has introduced a new line of high-speed CMOS double data rate 3 synchronous DRAMs (DDR3 SDRAM) and low-voltage DDR3L SDRAMs with densities of 1 Gb, 2 Gb, and 4 Gb in 78-ball 9 mm by 10.5 mm by 1.2 mm and 96-ball 9 mm by 13 mm by 1.2 mm FBGA packages. With their double data rate architecture, the devices released today offer extremely fast transfer rates of up to 1600 Mbps/pin and clock rates of 800 MHz.

With minimal die shrinks, the company's DDR3 (1.5 V) and DDR3L (1.35 V) SDRAMs provide reliable drop-in, pin-for-pin-compatible replacements for a number of similar solutions used in conjunction with newer-generation microprocessors for industrial, consumer, and telecom applications — eliminating the need for costly redesigns and part requalification.

The AS4C64M16D3, AS4C128M8D3, AS4C128M16D3, AS4C256M8D3, AS4C256M16D3, and AS4C512M8D3 DDR3 SDRAMs operate from a single +1.5-V (±0.075 V) power supply, while the AS4C64M16D3L, AS4C128M8D3L, AS4C128M16D3L, AS4C256M8D3L, AS4C256M16D3L, and AS4C512M8D3L DDR3L SDRAMs operate from a single +1.35-V power supply. The devices are offered with a commercial temperature range of 0 °C to +95 °C and an industrial temperature range of -40 °C to +95 °C.

The DDR3 and DDR3L SDRAMs are internally configured as eight banks of 64M, 128M, 256M, and 512M x 8 bits and/or 16 bits. The devices offer fully synchronous operation and provide programmable read or write burst lengths of 4 or 8. An auto precharge function provides a self-timed row precharge initiated at the end of the burst sequence. Easy-to-use refresh functions include auto- or self-refresh, and a programmable mode register allows the system to choose the most suitable modes to maximize performance. RoHS-compliant, the devices are lead (Pb)- and halogen-free.

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