Secure boot FPGA protects valuable IP from attack

Results of the testing show Microsemi’s secure boot solution has sufficient design margin to protect against side channel attacks. TVLA was developed to address the shortcomings of evaluation-based testing in this field. Rather than focusing on key extraction, which may depend heavily on the expertise of the evaluator, TVLA is based on a statistical approach to derive an objective pass/fail score on the underlying system’s information leakage.

Microsemi’s secure boot SRAM FPGA reference design suits systems with requirements for high value IP protection, including mitigations against side-channel attacks. Key applications include protection of high value commercial and critical infrastructure systems from cloning and reverse engineering. All commercially available SRAM FPGAs on the market today are susceptible to DPA and other related side-channel attacks, which can expose the bitstream decryption key and risk loss of valuable IP. Microsemi’s secure boot FPGA solution uses the company’s SmartFusion 2 SoC FPGA to securely load target SRAM FPGAs, with all cryptographic processing performed in a DPA-safe manner. All cryptographic processing IP in the solution includes pass-through licenses from CRI for both the SmartFusion2 host and target FPGA platforms.

“Microsemi’s secure boot solution ensures confidentiality and authentication of an underlying system design by leveraging the high security of our SmartFusion2 SoC FPGAs as a root-of-trust,” said Paul Quintana, director of vertical marketing for defense, security and computing at Microsemi. “Having a strong root-of-trust is often a critical element to protect and assure a design has not been modified.”

This technology is suitable for the defense and security market, as defense-grade systems often have requirements for anti-tamper to protect against reverse engineering of the underlying technology. This is a crucial requirement, especially for systems purposed for foreign military sales (FMS). Microsemi is currently engaged with leading defense contractors to implement this technology.

According to Strategy Analytics, global spending on RF-based Electronic Warfare (EW) systems is forecast to grow to more than $9.3bn through 2022. The Strategy Analytics Advanced Defense Systems (ADS) service forecast model, "Airborne EW (EA) Systems and Components Forecast 2012-2022," predicts a future shift towards reestablishing airborne EW capabilities that counter anti-access, area-denial systems will translate into spending on airborne EW systems - accounting for over 35% of this global spending.

DPA is an insidious and powerful technique hackers use to extract secrets such as cryptographic keys from an electronic device by externally monitoring the instantaneous power consumed by the device while it is operating. Microsemi’s secure boot technology is a highly effective security measure that ensures a programmable device is executing an authentic code that has not been tampered with or altered.

SmartFusion2 SoC FPGAs integrate inherently reliable flash-based FPGA fabric, a 166MHz ARM Cortex-M3 processor, advanced security processing accelerators, DSP blocks, SRAM, eNVM and industry-required high performance communication interfaces, all on a single chip. Microsemi's SmartFusion2 SoC FPGAs are designed to address fundamental requirements for advanced security, high reliability and low power in critical communications, industrial, defence, aviation and medical applications.

The results of Microsemi’s DPA testing were presented recently at the Anti-Tamper National Forum in Baltimore. Reference designs and user guides are available now, including an evaluation model, full customisable reference designs and design services.