FPGAs

FPGAs support 900Mb/s per lane operation for MIPI D-PHY interfaces

26th October 2015
Nat Bowers
0

Enabled by the latest Diamond 3.6 design tool suite software update, Lattice Semiconductor's MachXO3 FPGAs support 900Mb/s per lane operation for MIPI D-PHY interfaces. The MachXO3 devices can now be used to bridge a wide variety of image sensors & displays with MIPI D-PHY, CSI-2 or DSI interfaces at speeds of up to 900Mb/s.

Lattice Diamond design software is a complete suite of FPGA design tools with an easy-to-use interface, efficient design flow, superior design exploration and more. The new software release, version 3.6, will enable MachXO3 customers to design more powerful yet still low power, small form factor FGPA bridging and I/O expansion solutions.

Shyam Chandra, Senior Product Marketing Manager, Lattice Semiconductor, commented: “Our MachXO3 FPGAs are becoming popular choices for image sensor and LCD bridging solutions in cameras, displays and machine vision applications. In addition, the production-proven MachXO3 family delivers the industry’s lowest power, smallest package sizes and lowest cost per I/O, making these devices best suited in server, communication and industrial applications.”

MachXO3L and MachXO3LF devices can now be used for bridging HD (1920x1080px at 60fps) and WQHD (2560x1440px at 60fps) displays as well as 4K at 60fps with a wide variety of image sensors and processors. The MachXO3 family is available in wafer level chip-scale packages (0.4mm ball pitch) and flip-chip-BGA (0.5mm ball pitch) that are suited for high performance, small form-factor applications.

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