EVE’s ZEMI-3 Methodology Used by Fujitsu Microelectronics Solutions to Implement Integrated Algorithm-to-Emulation Flow

15th May 2012
News Release from: EVE Inc
Written by : ES Admin
EVE today announced that its ZeBu hardware-assisted verification platform and ZEMI-3 transaction-level modeling methodology have been adopted by Fujitsu Microelectronics Solutions Limited. Fujitsu Microelectronics Solutions implemented an integrated algorithmic C verification to register transfer level emulation flow for its high-level synthesis design methodology.
“An HLS design methodology accelerates functional verification by raising the abstraction level, decreasing the time and cost of RTL design,” remarks Takashi Nishikawa, of the Design Technology Department, Technology Development Division at Fujitsu Microelectronics Solutions Limited.

“Accordingly, we are continually improving our HLS design methodology with great success. We built an RTL verification environment using the SystemVerilog DPI-C (Direct Programming Interface-C), and implemented the integrated flow from algorithmic C verification to RTL emulation with ZEMI-3 and ZeBu, deployed since 2006. When we deployed the flow with ZEMI-3 and ZeBu in designing a wireless application, it provided 1,300X acceleration against simulation.”

“We are delighted to see a successful deployment of ZEMI-3 and ZeBu in a real design environment,” says Luc Burgun, EVE’s chief executive officer and president. “The results reported by Fujitsu Microelectronics Solutions are proof of the value of our emulation platform in developing modern designs.”

More details will be available during an educational seminar hosted by EVE Friday, June 15, in Yokohama, Japan.

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