TSMC selects Cadence library characterisation tool setting
Cadence has revealed that TSMC has adopted the company's solutions for 16nm FinFET library characterisation. Based on Cadence Virtuoso Liberate characterisation solution and Spectre circuit simulator, the library characterisation tool setting includes environment setup and sample templates for TSMC standard cells.
Enabling mutual customers to speed up their library characterisation cycle, combining the Liberate solution and Spectre circuit simulator delivers superior convergence and accuracy. In testing performed with TSMC, the combined solution reduced the turnaround time by half for 16nm FinFET standard and complex cell-characterisation cycles. Therefore, TSMC has incorporated the Liberate solution with Spectre into its library characterisation production flow for the latest 16nm FinFET libraries.
A reference kit is available which gives TSMC customers the tools needed to enable re-characterisation that addresses specific design challenges with a consistent methodology that meets stringent accuracy and performance requirements.
Tom Beckley, Senior Vice President, Custom IC & PCB Group, Cadence, comments: “Library characterisation is an important part of 16nm FinFET collaboration with TSMC. Through this collaboration, customers can benefit from improved throughput, accuracy and capacity required for 16nm FinFET library characterisation.”
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