ThreadX/SMP enables developers to take advantage of the significant performance boost of sharing the processing load over the multiple processor cores of the 1004K CPS while maintaining the real-time responsiveness critical to demanding embedded applications. Licensees of the 1004K CPS can now access this powerful development and run-time solution for performance-intensive designs.
ThreadX/SMP offers developers of products based on the 1004K CPS:
• Incremental processing resources
• Automatic load-balancing across all cores
• Ease of application programming
• Use of same code for single and multicore versions
• Increased performance without increased programming complexity
ThreadX/SMP is based on Express Logic’s popular ThreadX RTOS, a small, highly efficient embedded OS that minimizes system overhead and provides lightning-fast real-time response. With as small as a 10KB footprint and sub-microsecond interrupt response and context switch, ThreadX/SMP complements the multicore architecture of the 1004K CPS with the ease of SMP, while retaining hard real-time responsiveness. ThreadX/SMP is the ideal RTOS for demanding real-time applications where high-efficiency and high-performance are needed. Together, ThreadX/SMP and the 1004K CPS provide the system developer with a combination of high-performance and ease-of-use that speeds time to market.
MIPS Technologies Welcomes ThreadX/SMP
MIPS Technologies’ 1004K CPS offers up to 4 processors, each with 1 or 2 Virtual Processor Execution units (VPEs), and a unified shared memory accessible by all processors. Express Logic uses this shared memory to design a symmetric multiprocessor version of the ThreadX RTOS that runs concurrently on all processors from a single copy in shared memory. Application processing is automatically distributed across the processors as processing demands dictate, so the developer does not need to be concerned with managing multiple processors. Because of this, programming the 1004K CPS is as straightforward as developing an application for a single-core processor with the benefit of multicore performance.
“We’re delighted that ThreadX/SMP will support licensees of our 1004K CPS—the industry’s only licensable multi-threaded multiprocessing IP core,” noted Art Swift, vice president of marketing, MIPS Technologies. “The 1004K CPS leverages multi-threading to extend performance beyond traditional multiprocessor solutions. It is ideal for applications that demand high efficiency and real-time response, and the addition of ThreadX/SMP enhances these capabilities. Our combined solution will accelerate customer development in performance hungry applications.”
ThreadX/SMP achieves a high degree of ease-of-use by enabling multicore applications to be developed without needing to know the details of the 1004K architecture. ThreadX/SMP efficiently allocates and manages powerful hardware resources to maximize application thread efficiency. ThreadX/SMP transparently maps application threads to individual cores within the 1004K CPS, providing automatic load balancing.
The low overhead of ThreadX produces an efficient thread-to-core allocation and assignment—a feat that can be difficult for larger RTOSes to achieve, especially when there are more threads than cores.
Real-Time SMP enables an application to apply the resources of multiple processors to serve its threads, without tailoring the program logic to manage and arbitrate among the processors. In a single processor system, once a top-priority thread begins execution, other threads must wait. With Real-Time SMP, threads of equal priority can run in parallel on the other processors, effectively balancing overload situations where one processor could not handle the volume of data requiring processing. Using Real-Time SMP, the application can launch a second, third, and fourth thread to help with the processing. The additional threads can be defined at initialization and automatically run on any available processor as needed, or created dynamically as the executing thread identifies processing demand beyond its capabilities. The ThreadX/SMP scheduler can service up to four threads at a time as long as they are of equal priority. The developer can choose to define Real-Time SMP as fully automatic, allowing the RTOS scheduler to run threads on all processors as needed, or semi-automatic, where the application thread makes the determination that it wants to start another core to help with the workload.
When activated, the ThreadX scheduler determines the highest priority thread ready to run (READY). The scheduler then sets the context for that thread and causes it to run on processor-1. The scheduler also determines if there is an additional thread at the same priority, which also is READY. If so, that thread’s context is set, and the thread run on processor-2. The scheduler then goes into idle to await an event or service request from an executing thread.
“Extending ThreadX/SMP for the MIPS32 1004K family celebrates our long-standing relationship with MIPS Technologies and its customers,” noted William E. Lamie, president of Express Logic. “ThreadX/SMP enables developers to migrate existing multithreaded applications for a single core to the 1004K CPS in order to gain a significant performance boost without rewriting the application. ThreadX/SMP and the MIPS 1004K CPS enable applications to run faster, without a redesign.”