Reduce verification schedule by up to three months

8th June 2015
Posted By : Siobhan O'Gorman
Reduce verification schedule by up to three months

Cadence Design Systems has announced the next-gen Cadence JasperGold formal verification platform. This formal verification solution integrates Cadence Incisive formal technology and JasperGold technology into a single platform that delivers up to 15 times performance improvement versus previous solutions. Moreover, as an integrated part of the Cadence System Development Suite, the JasperGold technology can help to reduce verification schedule by up to three months.

The JasperGold platform significantly improves design quality and efficiency by integrating a comprehensive set of features into one solution, such as design compilation and formal engine technologies from Incisive Formal Verifier and Incisive Enterprise Verifier, including the innovative Trident multi-cooperating engines. This enables easy migration for existing Incisive customers and up to 15 times performance improvement for both bug-hunting and proof convergence modes. The next-gen JasperGold platform has been fully integrated with the Cadence System Development Suite’s Incisive simulation and Palladium emulation platforms, and with vManager tool to enable comprehensive metric-driven verification. This results in an up to three-month schedule reduction through formal-assisted verification closure. Proven JasperGold Visualize and QuietTrace technologies, which have been integrated with the Indago debug platform to further expand analysis and on-the-fly what-if exploration, help reduce root-cause debug time up to 5-100 times.

“As long-time customers of Incisive formal and simulation solutions, we are impressed with the next-gen JasperGold platform,” said Mark Dunn, Executive Vice President, Imagination Technologies. “As well as improved debug and ease-of-use, we’ve achieved a significant increase in performance compared to Incisive Enterprise Verifier, as measured by proof convergence in a given time.”

”Delivering high quality SoC designs efficiently in an era of increasing design complexity is a continuing customer challenge,” commented Oz Levia, Vice President, Formal and Automated Verification, System & Verification Group, Cadence. “With this next-gen JasperGold platform, we’ve brought together the best of Cadence’s formal verification technologies into a single JasperGold platform and linked that with simulation, emulation, debug and verification management to create a truly compelling and comprehensive solution to this customer challenge.”


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