Design
PLX Upgrades Feature-Rich SDK for Designs Using Industry’s First PCI Express 3.0 Switches
PLX Technology today announced an upgraded and free software development kit (SDK) supporting PLX ExpressLane PCI Express (PCIe) Gen 3 switches. This exclusive suite of software tools works in conjunction with PLX’s on-chip diagnostic hardware, together called visionPAK. The SDK enables designers to get to market faster with instant access to internal chip registers, and offers diagnostic features as well as performance monitoring of an entire system's performance, thus optimizing the usage of costly test equipment such as logic analyzers, traffic generators and high-speed oscilloscopes.
Meas“Designers of PCI Express-based systems have enough to concentrate on without the added burden of creating or piecing together their own development tools that would add significant time to the design process and still may not satisfy their goals,” said Vijay Meduri, PLX vice president of engineering, switches. “This enhanced PLX SDK, which now supports PCI Express Gen 3 in addition to earlier generations of the technology, will free them to focus on the designs themselves – and get the resulting systems complete, tested and on the market.”
Following are some of the key features of the PLX SDK beta version 6.4:
* Support for PLX PCIe Gen 3 switches
* New SerDes eye measurement enhancements includes SerDes height and width, plus gradient plot and time estimate
* Performance Monitor updated for PLX PCIe Gen 3 switches
* Packet Generator tool updated for PLX PCIe Gen 3 switches
* Faster downloads because the SDK size has been reduced by half
* Special support for AHB register access
* Kernel drivers for PLX PCIe Gen 3 switches with on-chip DMA
* Compare register dump text files
* Slave Mode Loopback for PLX PCIe Gen 3 switches
* Auto-detection of Requestor ID for setting up Non-Transparent Mode Address Translation
* Java-based PEX Device Editor GUI for Linux (January 2011)