Design

Parasitic extraction platform minimises IC design guesswork

27th April 2015
Barney Scott
0
Datasheets

With its Calibre xACT parasitic extraction platform, Mentor Graphics addresses a wide spectrum of analogue and digital extraction needs, including 14nm FinFET, while minimising guesswork and setup efforts for IC designers. The Calibre xACT platform combines accuracy and TurnAround Time (TAT) by automatically optimising extraction techniques for specific process nodes, applications, design sizes and extraction objectives.

Customers using the Calibre xACT platform for parasitic extraction have experienced improvements in TAT as high as ten times, while meeting the most stringent accuracy requirements. Samsung has worked extensively with Mentor Graphics on the development and qualification of the Calibre xACT platform for 14nm, and used it during technology development because of the high accuracy it provides.

The Calibre xACT product’s ability to employ a single rule deck for a range of extraction applications allows customers to get the accuracy and fast TAT they need without having to manually modify their rule decks or tool configuration.

“After careful benchmarking of the leading extraction products, we selected Calibre xACT to be our reference signoff extraction tool for all of our next-gen designs,” said Dragomir Nikolic, CAD Director, Cypress Semiconductor. “This includes products at the 90nm and 65nm process nodes. We found Calibre xACT to have the best combination of high accuracy and fast turnaround available among extraction products targeting leading-edge nodes. We also see great value in the ability to use a single extraction tool to produce optimum results across a wide variety of applications, from transistor level to full chip digital extraction.”

Circuit designers have to wrestle with performance versus accuracy throughout the design cycle. Parasitic extraction is no different. With the leading process nodes using more complex FinFET devices, design engineers are pushing for tighter accuracy, while also needing higher performance and capacity for billion transistor designs. In fact, all process nodes are seeing growing complexity with the mix of memory, analogue, standard cell, and custom digital content in modern ICs. This complexity poses a range of different challenges for extraction tools. To meet these requirements, the Calibre xACT platform uses a combination of compact model, field solver and efficient multi-CPU scaling technologies to ensure robust accuracy as well as turnaround performance needed to meet schedule deadlines.

The Calibre xACT extraction platform is integrated with the entire Calibre product line for a seamless verification flow, including the Calibre nmLVS product for complete transistor-level modeling, and the Calibre xACT 3D product for targeted, extreme-accuracy extraction applications. It also interoperates with third-party design environments and formats to ensure compatibility with existing design and simulation flows.

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