IC Validator certified for 14nm manufacturing processes

With this certification, Samsung Foundry customers are enabled with the efficiency advantages of IC Validator and can now verify their designs with confidence that the tool and the run-sets have been certified by Samsung Foundry for the highest level of accuracy.

The certified run-sets, including design rule checking (DRC), layout-versus-schematic (LVS) and metal fill technology files, are immediately available from Samsung Foundry, ensuring a high level of manufacturability compliance and enabling design for maximum yield.

IC Validator, part of the Synopsys Galaxy Design Platform, is a scalable physical verification tool suite including DRC, LVS, extended electrical rule check (ERC), metal fill and DFM enhancement. IC Validator uses its scalable hybrid data and command processing engine as a powerful platform for coding and validating the complex polygon and edge-based rules required for emerging process nodes.

IC Validator enables coding at higher levels of abstraction and is architected for near linear scalability that maximises utilisation of mainstream hardware, using smart memory aware load scheduling and balancing technologies. These capabilities enable Samsung Foundry to streamline design rule development and deployment as well as provide mutual customers with the high accuracy and excellent scalability needed for leading edge process nodes.

IC Validator is also a suitable add-on to the IC Compiler II system for In-Design physical verification. In-Design is enabled by the intelligent integration of IC Validator and IC Compiler II, making it possible for place-and-route engineers to perform independent sign-off quality analysis earlier, before the design is finalised and while correction can be automated.

In-Design technology enables new high productivity functionality, such as automatic DRC repair, timing aware metal fill and rapid ECO validation, all within the place-and-route environment. In-Design physical verification eliminates expensive iterations with downstream analysis tools and maintains a convergent design flow to physical sign-off.

“As manufacturing complexity is placing increased challenges on designers to deliver within schedule, it is extremely important that we continue to collaborate closely with leading foundries like Samsung,” said Bijan Kiani Vice President, Product Marketing, Design Group at Synopsys. “This certification demonstrates how designers with the most demanding designs are driving the market towards better sign-off verification solutions that are also closely integrated into their design flows.”