Design

High level tool synthesises entire SoC design

25th February 2015
Barney Scott
0

Cadence has announced Stratus, the industry’s first high-level synthesis platform that can be utilised across an entire SoC design. This next-gen platform integrates Forte Cynthesizer and Cadence C-to-Silicon Compiler into one tool to deliver a tenfold productivity improvement, 20% better power, performance and area, and verification five times faster than a hand-written RTL flow.

Prior to the Stratus platform, no high-level synthesis tool was robust enough to be used across an entire SoC design, and designers were forced to choose the parts of their designs in which they would utilise the technology. With the Stratus platform, Cadence has eliminated that design compromise by integrating a comprehensive set of features into one platform. 

A 6th gen high-level synthesis core engine provides excellent usability and scalability across the full application space, including both control-centric and datapath-centric designs containing hundreds of blocks. Integration with Cadence Encounter RTL Compiler and Cadence Encounter Conformal ECO Designer is provided, to allow physically-aware and ECO-aware high-level synthesis and minimise implementation changes from Engineering Change Orders.

A rich intellectual property library of I/O interfaces and customisable floating point datatypes increases productivity by giving designers synthesisable optimized SystemC building blocks. Full IDE and automation of tool flow and multiple scenario evaluation enable full architectural exploration, and improve verification by providing a consistent environment from early TLM models through gates.

“With our high-level synthesis flow and the Stratus platform, we're now doing the kinds of things that we couldn't have imagined doing previously,” said Ray McConnell, chief technology officer of Blu Wireless Technology. “For example, we can now have a working prototype of a complete multi-gigabit modem with a mmwave beamsteering antenna available when we're doing the integration and system and software validation. Previously, we would have had to use poor approximations for early validation. Having an early working prototype is having a significant business impact in terms of our potential customers' enthusiasm and confidence."

“Delivering SoCs with unique IP, while meeting tight schedule windows and keeping development costs down, continues to be a growing customer challenge, ” said Charlie Huang, Executive Vice President, Worldwide Field Operations, System and Verification Group, Cadence. “The Stratus platform leverages the best of the Forte and Cadence technologies, making it the most broadly applicable and usable high-level synthesis tool on the market today.”

The Stratus high-level synthesis platform is currently available.

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