Design

Emulex has adopted Synopsys' VIP for the Ethernet protocol

17th July 2014
Siobhan O'Gorman
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Synopsys has announced that Emulex has adopted it's Verification IP (VIP) for the Ethernet 1G/10G/40G/100G protocol. This is based on Synopsys' SystemVerilog and UVM architecture, offering ease of use, ease of integration, performance, configurability, coverage, and debug within UVM environments. The VIP also supports Synopsys' Protocol Analyzer, a protocol-centric debug environment.

"We adopted Synopsys verification IP because time-to-market and the ability to deliver the highest speeds and newest features to our customers are critical," said Margie Evashenk, Chief Development Executive, Emulex. "We have collaborated with Synopsys over many project generations for the verification of our Ethernet-controllers, and trust them to provide the emerging Ethernet speeds, features, compliance test suites and ease-of-integration that enable us to hit our aggressive project schedules."

"With the growing size and complexity of today's SoCs, Verification IP is becoming an increasingly important technology to help customers verify their chip designs," said Debashis Chowdhury, Vice President of R&D for the Synopsys Verification Group. "Synopsys' portfolio of 100% native SystemVerilog VIP provides SoC teams with the verification and compliance environments for industry protocols they need to build and verify differentiated products and accelerate their time to market."

The Synopsys Verification IP for Ethernet 1G/10G/40G/100G is available now.

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