Design

Development environment for ARM premium mobile IP suite announced

5th February 2015
Barney Scott
0
Datasheets

Cadence Design Systems and ARM have jointly announced the availability of a complete SoC development environment, supporting the ARM premium mobile IP suite that incorporates the latest ARM Cortex-A72 processor, ARM Mali-T880 GPU and ARM CoreLink CCI-500 Cache Coherent Interconnect solution.

Available today is a Cadence reference flow for the ARM Cortex-A72 processor that supports advanced manufacturing processes including TSMC 16nm FinFET Plus. Also available with the Cadence flow is performance-leading ARM Artisan physical IP and ARM POP IP for the ARM Cortex-A72 processor and ARM Mali-T860 and T880 GPUs, enabling designers to meet aggressive processor performance and power goals.

The Cadence development environment includes digital and system-to-silicon verification tools and IP that support the ARM premium mobile IP suite, speeding time to market for complex, high-end mobile designs.

In support of this processor and the ARM premium mobile IP suite, Cadence collaborated with ARM to target optimal PPA for the premium mobile market by defining ideal reference flows from RTL synthesis to final signoff. The flow is proven by internal usage at ARM and includes Encounter Digital Implementation System, Encounter RTL Compiler, multiple Encounter Conformal products, Tempus Timing Signoff Solution, Quantus QRC Extraction Solution, Voltus IC Power Integrity Solution, and Physical Verification System.

The two companies also jointly integrated Cadence Palladium XP Series and ARM Cortex-A72 Fast Models to provide 50 times faster OS boot-up and 10 times speed-up, as compared with the previous emulation-only solution, in hardware-software co-development, synchronised cycle-accurate hardware/software debug support and Dynamic Power Analysis to optimise the balance between power consumption and expected performance using realistic software loads.

The co-operative also delivered an integration with Cadence Interconnect Workbench and ARM CoreLink CCI-500 that matches automatically generated testbenches to the ARM IP’s many possible configurations. These testbenches are used to perform cycle-accurate performance analysis of the interconnect sub-system, optimising device performance and speeding time to market.

“The ARM Cortex-A72 processor sets a standard for delivering a premium mobile experience and is expected to be the highest performing CPU technology for mobile SoCs,” said Noel Hurley, General Manager, CPU group, ARM. “Our continued collaboration with Cadence helps our mutual customers differentiate themselves and deliver innovative, industry-leading solutions for mobile devices.”

“We collaborated closely with ARM to co-optimise our advanced digital implementation and signoff solutions, system-to-silicon verification tools and IPs with the ARM Cortex-A72 processor, and we’re already seeing excellent results with early high-end mobile customers,” added Dr. Chi-Ping Hsu, Senior Vice President and Chief Strategy Officer for EDA at Cadence. “In addition, we worked together to ensure that the Cadence flow allows customers to integrate the ARM Mali-T880 GPU and ARM CoreLink CCI-500 to achieve optimal results at advanced process nodes. The Cadence SoC development environment supporting the ARM premium mobile IP suite has been thoroughly tested so that designers can adopt these technologies with confidence.”

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