Design

DesignWare IP Prototyping Kits target 10 interface protocols

24th November 2014
Nat Bowers
0

Synopsys has announced DesignWare IP Prototyping Kits for 10 interface protocols, including USB 3.0, SSIC, PCI Express 2.0, PCI Express 3.0, DDR3, LPDDR3, LPDDR2, MIPI CSI-2, HDMI 2.0 and JEDEC UFS. The kits provide the essential hardware and software elements needed to reduce IP prototyping and integration effort by up to six weeks.

With the IP Prototyping Kits, hardware designers have a proven reference design that can be easily modified to explore design tradeoffs and validate a specific configuration of the IP, and software developers have a proven target for early software bring-up, debug and test.

With the increase in SoC hardware and software complexity, companies need more from their IP providers to help meet their time-to-market schedules. To help address designers' growing SoC design and integration challenges, DesignWare IP Prototyping Kits provide proven reference designs that enable designers to start implementing the IP in an SoC context in minutes. The kits include a Synopsys HAPS-DX FPGA-based prototyping system with pre-configured IP and SoC integration logic, a PHY daughter board, simulation testbench, reference drivers and application examples.

Jay Liang, CTO and Vice President of Engineering, NationZ, comments: "The DesignWare IP Prototyping Kit for USB 3.0, along with its proven reference design, helps accelerate our early driver and software development and enable us to start FPGA validation up to six weeks earlier. In addition, the IP Prototyping Kit improves our SoC's overall quality by helping us quickly validate the hardware and software design in numerous real-world scenarios."

The kits include either a host PC connection running the target operating system such as Windows, Linux, or others, or a DesignWare ARC processor-based 32-bit software development platform running Linux. Designers can modify the standard IP configuration for their target application through a fast iteration flow consisting of Synopsys' coreConsultant IP configuration tool, Synopsys' ProtoCompiler DX development and debug tool, and compilation scripts.

"As semiconductor companies face significant time-to-market pressures, increasing software content and more complex SoCs, they expect more from their IP providers to help them achieve their design goals. With the DesignWare IP Prototyping Kits, designers can achieve faster time to first prototype, easier IP integration and earlier software development, all of which help them accelerate their time-to-market," adds John Koeter, Vice President of Marketing, IP and prototyping, Synopsys.

The DesignWare IP Prototyping Kits for USB 3.0, SSIC, PCI Express 2.0, PCI Express 3.0, DDR3, LPDDR3, LPDDR2, MIPI CSI-2, HDMI 2.0, and JEDEC UFS protocols are available now.

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