“HighIP has concluded that we can produce state-of-the-art IP using Forte’s Cynthesizer and SystemC,” says Phil Tharp, principal engineer at HighIP. “The use of this methodology has allowed us to produce high-quality IP with fewer resources and has the added advantage that we can offer high-level TLM models that are guaranteed accurate.”
“Design groups have been building SystemC IP to promote design reuse and faster time-to-market for more than a decade,” adds Brett Cline, Forte’s vice president of sales and marketing. ”HighIP’s adoption of Cynthesizer HLS allows them to bring the next generation of reusable IP to the general market in less time and at a lower cost.”
Forte will offer continuous demonstrations of Cynthesizer in Booth #1430 during the 49th Design Automation Conference (DAC) June 4-6 at the Moscone Center in San Francisco.
The demonstration will highlight Cynthesizer’s complex hierarchy support, custom transaction-level modeling (TLM) interfaces and other advanced features on an ARM-based image processing system with control- and datapath-type blocks. In addition, Phil Tharp will host a discussion on using Cynthesizer for the design of the HighIP USB models with a demonstration of the live hardware at 11 a.m. Wednesday, June 6, in Booth #1430.