Characterisation solution delivers 20x performance improvement

28th October 2014

Mick Elliott

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With the increasing complexity of SoCs, and the industry shift towards intellectual property (IP) reuse and digital-on-top design flows for signoff with static analysis tools, Liberty representations are required for all blocks in the design including mixed-signal macros. To simplify this process, Cadence Design Systems has introduced the Virtuoso Liberate AMS characterisation solution which automates standard Liberty model creation for large mixed-signal macro blocks by capturing the interaction between digital and analogue paths and modelling it into a final Liberty library.

Cadence says it is the industry’s first dynamic simulation characterisation solution for mixed-signal blocks such as phase-locked loops (PLLs), data converters, high-speed transceivers and I/Os.

Built upon the proven Cadence Liberate characterisation platform, Virtuoso Liberate AMS characterizes post-layout netlists of mixed-signal macros with millions of associated parasitic elements 20X faster than traditional “divide and conquer” FastSPICE simulation methods and with true SPICE accuracy to enable accurate system-on-chip (SoC) signoff.

To increase throughput and reduce turnaround time from weeks to hours, Virtuoso Liberate AMS integrates Cadence’s advanced FastSPICE technology, Spectre XPS, and employs a unique hybrid partitioning approach to statically identify required arcs and dynamically exercise them to characterize large mixed-signal blocks.

This hybrid partitioning approach identifies circuit activity at the block level to carve out a critical-path partition for each logic arc and then characterises each partition with true SPICE accuracy to create highly accurate library models.

For custom circuit designers, Virtuoso Liberate AMS is integrated with Virtuoso Analog Design Environment XL and leverages Virtuoso Analog Design Environment XL testbenches and setup to quickly move from circuit design validation into library generation.