Design
Design tool delivers 10x physical design throughput
Synopsys have presented what they call a 'game-changing' successor to their IC Compiler, offering ultra-high-capacity design planning, unique clock-building technology and advanced global-analytical closure techniques. The IC Compiler II has been built from the ground up on a completely new, multi-threaded infrastructure.
HD SoC enables on demand cable TV throughout China
Enabling the deployment of cable services to millions of China cable subscribers, Inspur Group has selected Broadcom's BCM7583 HD SoC to power the company's set-top boxes (STBs). The SoC combines cost-effective design and high-performance capabilities, allowing operators to enhance services while reducing overall cost.
Cadence tools reduce leakage power by 50% in smartphone chip
Yamaha has used components of the Cadence Low-Power Solution to achieve a 50% reduction in leakage power in its latest chip for smartphones. Yamaha selected Cadence Encounter RTL Compiler, Cadence Encounter Conformal Low Power and Cadence Encounter Digital Implementation System.
IC Compiler deployed for hierarchical design implementation
MediaTek has initiated deployment of Synopsys' IC Compiler place and route solution for hierarchical design implementation. This collaboration extends the deployment of IC Compiler to the full flow starting from hierarchical design planning, through top and block-level place and route to final chip assembly.
Software feature reduces electrical power consumption
A feature in the latest release of the company's windows-based WINCON operating system, the ENERGY PILOT software feature is designed to reduce the consumption of electrical power and process gas for manufacturers that may have interruptions in production.
Reference design for universal-input auxiliary power supply
Based on a member of Power Integrations’ LinkZero-LP family of ICs, the DER-417 reference design has been announced by Power Integrations. This reference design is for an 8W, universal-input auxiliary power supply that achieves zero standby power consumption for appliance applications.
IDE meets industrial, rail and automotive safety standards
Building on its prior certifications, the MULTI integrated development environment (IDE) from Green Hills Software has been certified to meet the highest levels of tool qualification specified in the IEC 61508:2010 (Industrial), EN 50128:2011 (Railway) and ISO 26262:2011 (Automotive) functional safety standards.
Accelerate software development of ARC processor-based SoC designs
The DesignWare ARC Software Development Platforms from Synopsys accelerates software development and debug of ARC processor-based SoC designs. The ARC AXS101 and AXS102 Software Development Platforms are complete and ready-to-use hardware and software platforms that include ARC processors, peripherals, pre-built Linux and MQX operating systems, device drivers, and application examples, enabling designers to start software development prior to SoC...
Mobile virtualisation solution approved by U.S. DoD
Green Hills Software and Samsung have revealed that the Samsung KNOX Hypervisor Type-1 mobile virtualisation solution has been approved for use on sensitive U.S. Department of Defense enterprise networks. This represents a broad collaboration between Green Hills Mobile, Samsung, mobile network carriers, systems integrators and the Department of Defense.
Precision AFEs for Current Measurement are available for analog ASICintegration
JVD announce the availability of a second critical piece of IP for Analog Front Ends. Following the announcement of the SCi310 Current to Voltage Converter in January, JVD, in conjunction with Systemcom, has made available two additional IP blocks designed for conditioning signals from sensors where the generic information about the phenomenon being detected, whether light or other physical or chemical or electromechanical apparatus, passes the f...