Design
ARM CoreLink system IP enables next-gen heterogeneous SoCs
Designed to enhance system performance and efficiency in next-gen premium mobile devices, ARM has announced new CoreLink system IP. The CoreLink CCI-550 interconnect enables ARM big.LITTLE processing and a fully coherent GPU while lowering latency and increasing peak throughput while the CoreLink DMC-500 memory controller provides higher bandwidth and latency response for processors and display.
Synopsys' IC Compiler II surpasses 100 production designs
Since its introduction in 2014, Synopsys' IC Compiler II place and route system has been successfully deployed on more than 100 production designs, including more than 50 unique customers across 18 different foundry process nodes. This game-changing successor to IC Compiler, the industry's leading place and route solution, has enabled first-pass silicon success on dozens of these production designs ranging from 130 to the latest 10nm process node...
Securely turn biometric data into a cryptographic key
Fujitsu Laboratories is developing a technology that can turns biometric data, such as palm veins, into a cryptographic key, enhancing the security of the encryption method and protecting confidential data such as IDs and passwords.
IP subsystem combines USB Type-C, USB PD & DisplayPort Alt Mode
Cadence Design Systems has announced that it now offers the industry’s first IP subsystem with pre-verified components including a single-chip port controller IP that integrates USB Type-C, USB Power Delivery and DisplayPort Alternate Mode (Alt Mode). This design IP enables the development of single-chip solutions for combining video, audio, USB and up to 100W of power on a single external connector.
User interface framework creates great-looking apps
ByteSnap Design launched its Linux OpenGL SnapUI user interface framework amongst its exciting developments on Stand L22 at this year’s Electronic Design Show. Rewritten from the ground up, this recent design is focused on supporting the iMX6 processor to leverage graphical performance, whilst including core features that have made SnapUI so successful for end customers.
Real-Time and 2D/3D Interface Analysis Software at productronica
Akrometrix will exhibit its TherMoire’ AXP modular metrology platform at productronica. It provides shadow moire’, digital fringe projection, and digital image correlation capabilities in one platform. Akrometrix also will demonstrate its new Real Time Analysis Software along with Array Generation Software.
Embedded software suits smart grid synchronisation
Meeting demand for smart grid and synchrophasor synchronisation in the power industry, Microsemi has announced its first complete power profile-compliant embedded software. The software addresses IEEE C37.238-2011 power profile requirements with grandmaster, boundary clock and slave only ordinary clock functionality, while providing industry-leading synchronisation performance.
Remote management middleware tool improves system reliability
ADLINK Technology has announced the latest version of its remote management middleware tool, SEMA 3.0, which is able to monitor and collect system performance and status information from distributed devices in a timely, flexible and precise manner. Added functionality offered in SEMA 3.0 enhances the already comprehensive feature set of the existing SEMA solution.
CANopen protocol stack available for Renesas' RX231 MCUs
Renesas Electronics Europe and port have announced the availability of a highly efficient CANopen protocol stack for Renesas’ smart 32-bit RX231 MCUs. The RX231 series provides large on-chip SRAM of up to 64kB and up to 512kB of on-chip flash, paired with one CAN interface, which is fully compliant with the CAN 2.0B and the ISO11898-1 (standard and extended frames) standards and is therefore well-suited to industrial and consumer applicatio...
MIPI D-PHY IP operates at 2.5Gb/s per lane on TSMC 16FF+ process
Synopsys has announced the industry's first demonstration of MIPI D-PHY IP on TSMC's 16FF+ (16nm FinFET Plus) process operating at 2.5Gb/s per lane. The demonstration shows the DesignWare D-PHY receiver lane connected to Keysight Technologies' test equipment, which provided burst-mode stimulus for stressed eye testing and the transmitter lane connected to the Keysight oscilloscope displaying the transmitter's performance.