Design Automation

Displaying 1 - 4003 of 4003

Design tool network mismatches in MMIC designs

The AWR Connected for DWT, a new NI AWR Design Environment flow enables integration with Design Workshop Technologies’ (DWT) design-rule checking (DRC) and/or layout vs. schematic (LVS) tools for printed circuit board (PCB) and module design.  The new AWR Connected for DWT DRC and LVS flow can run in one of two ways: in the full view/DWT user-interface (UI) mode or transparently from within the Microwave Office UI.  
20th May 2015

Reference design simplifies industrial PSUs

Reference design simplifies industrial PSUs
Power Integrations has announced the DER-479 reference design, which demonstrates an industrial power supply using the company’s LinkSwitch-4 family of CV/CC primary-side regulated switcher ICs with a 1200V Bipolar Junction Transistor (BJT). The design supports 440VAC line inputs and features three outputs, which combine to provide up to 11W of highly accurate constant-voltage DC power.
20th May 2015

Switch engine solution achieves CE 2.0 certification

Microsemi  has announced that it has achieved Metro Ethernet Forum (MEF) CE 2.0 certification for its Serval VSC7418 CE switch engine and CE service application software. A virtual requirement from service providers, the CE 2.0 certification enables Microsemi OEM and ODM customers to accelerate time-to-market with readily interoperable, standards-based equipment for Ethernet business service delivery.
20th May 2015


Software allows students to visualise ideas in an intuitive 3D way

Computer Simulation Technology announces the release of CST STUDIO SUITE Student Edition, a special free version of its flagship electromagnetic simulation package designed to help the engineers of tomorrow to get to grips with the basics of electromagnetic theory.
19th May 2015

Cloud software simplifies the development of IoE devices

Qualcomm has announced that its subsidiary, Qualcomm Atheros, is expanding its IoE platform with the addition of six new ecosystem providers whose distinct client software for cloud services are now integrated within the QCA4002 WiFi solution and its accompanying development platform. The addition of these providers further simplifies the development of devices that use WiFi to connect to the IoE by increasing cloud service flexibility and making these solutions available in a broader global reach.
19th May 2015

Speed the development of IEC 61508-compliant designs

Altera has announced the availability of the latest version of its Industrial Functional Safety Data package (Ver. 3) for systems designers using its FPGAs. The safety pack provides TÜV Rheinland-certified toolflows, IP and devices including Cyclone V FPGAs, enabling faster time-to-market for industrial safety solutions to IEC 61508 up to Safety Integrity Level 3 (SIL3).
19th May 2015

Fan-out wafer level packaging is entering a new era

Fan-out wafer level packaging is now entering a new era. With a high expected growth of the market, multiple new companies, OSATs and even foundries are involved in this platform. According to Yole Développement’s Fan-Out and Embedded Die: Technologies & Market Trends and Equipment & Materials for 3DIC & Wafer-Level Packaging Applications reports, the market reached more than $150m in 2014 and a CAGR of 30% for the next 5 years is expected, driven by mobile applications and the need of very thin packages for high I/O devices.
18th May 2015

Platform evaluates industrial drive & servo topologies

Platform evaluates industrial drive & servo topologies
A single hardware and software platform that makes it easier for engineers to develop and evaluate solutions for many industrial drive and servo topologies has been introduced by Texas Instruments. The DesignDRIVE kit and example software offer an easy path to begin exploring a wide variety of motor types, sensing technologies, encoder standards and communications networks.
15th May 2015

Broadcom provides access to Synopsys' ARC processors

Synopsys has announced that Broadcom has extended its license agreement, providing access to Synopsys' DesignWare ARC processors for an expanded range of advanced multimedia and networking SoC designs. Broadcom has standardised on Synopsys ARC processors to deliver advanced video compression capabilities in its SoCs for high-volume consumer devices.
15th May 2015

Low-power DRAM designs with higher density & performance

Synopsys has announced the availability of Verification IP (VIP) for the DDR4 3D Stacking (3DS) specification. Synopsys VIP for DDR4 3DS, based on its native SystemVerilog UVM architecture, is architected for ease of integration and configurability. The VIP for DDR4 3DS supports all JEDEC commands and provides pre-built DIMM (UDIMM, RDIMM, LRDIMM) models with protocol and timing checks, including support for memory vendor and the JEDEC standard part configurations. 
14th May 2015


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