Design Automation

Displaying 1 - 10 of 3470

Software could save 40% of customers’ time-to-market

Artesyn Embedded Technologies has announced a powerful software solution for its ATCA systems, which Artesyn believes could save up to 40% of customers’ time-to-market. System Services Framework (SSF) is a complete system management suite for Artesyn ATCA systems, allowing users or applications to configure and monitor the hardware and software elements of a single ATCA shelf or across multiple shelves.
23rd April 2014

Software speeds time to first prototype by 3X

Synopsys has announced the availability of Synopsys' ProtoCompiler software for Synopsys' HAPS FPGA-based prototyping systems. ProtoCompiler is an integrated prototyping tool set with built-in HAPS hardware knowledge, which enables the rapid bring-up of a prototype up to 3X faster than existing prototyping flows. ProtoCompiler also enables more efficient prototyping with HAPS by providing an automated partitioning engine, integrated debug support and improved HDL compilation.
23rd April 2014

14nm-based FPGA test chips successfully demonstrated

FPGA technology, based on Intel’s 14nm Tri-Gate process, has been successfully demonstrated by Altera. The 14nm-based FPGA test chips incorporate key IP components – transceivers, mixed-signal IP and digital logic – used in Stratix 10 FPGAs and SoCs.
23rd April 2014


Industry's first complete LPDDR4 IP launched

A complete LPDDR4 IP has been launched with the company, Synopsys, claiming it is the industry's first complete LPDDR4 IP solution. The IP includes Synopsys' DesignWare LPDDR4 multiPHY, Enhanced Universal DDR Memory Controller (uMCTL2) and verification IP (VIP), as well as hardening and signal integrity services.
23rd April 2014

Hardened floating-point DSP blocks are IEEE 754-compliant

Hardened floating-point DSP blocks are IEEE 754-compliant
Altera is industry's first programmable logic company to integrate hardened IEEE 754-compliant, floating-point operators in an FPGA, delivering unparallelled levels of DSP performance, designer productivity and logic efficiency. The hardened floating point DSP blocks are integrated in Altera’s 20nm Arria 10 FPGAs and SoCs, as well as 14nm Stratix 10 FPGAs and SoCs.
23rd April 2014

Reference design board for accurate current-sensing

Reference design board for accurate current-sensing
By monitoring the voltage drop across a copper track on a PCB, a new reference design board from ams achieves linear current measurement up to 100A with an accuracy of ±1%. The board takes advantage of the very high sensitivity and precision of the AS8510, an integrated data acquisition front end which provides two measurement channels.
23rd April 2014

Cadence snaps up Jasper Design Automation

Cadence Design Systems is to buy Jasper Design Automation. The combination of Cadence’s System Development Suite and Jasper’s multiple verification solutions built on the JasperGold platform will expand differentiation of Cadence’s system verification platform, and will be tightly integrated with Cadence’s common debug analysis, formal and semi-formal solutions, simulation, acceleration, emulation and prototyping platforms, while leveraging its unified verification planning and metric-driven verification flow.
22nd April 2014

Altium signs up to AUTOSAR partnership

Altium signs up to AUTOSAR partnership
Altium a supplier of Smart System Design Automation, 3D PCB design and embedded software development (TASKING) has joined the AUTOSAR (AUTomotive Open System ARchitecture) development partnership. TASKING is a leading provider of compiler solutions to software developers within the microcontroller market. TASKING’s development tools are highly regarded by high-end suppliers, particularly within the automotive industry, to program micro-controller based powertrain, driver assistance and safety related applications worldwide.
17th April 2014

ARM Cortex-A57 Performance Analysis Kit previewed at forum

Prototype solution supplier Carbon Design Systems previewed its newly released ARM Cortex-A57 Carbon Performance Analysis Kit (CPAK) at the recent Freescale Technology Forum.The release includes multiple CPAKs featuring the ARM Cortex-A53 and Cortex-A57 processor cores. CPAKs enable debug and analysis of 64-bit executables and come complete with pre-built software code to configure and exercise the systems.
17th April 2014

Digital and custom solution for TSMC N16 FinFET process

Synopsys has announced availability of the V1.0 certified solution for cell-based and custom implementation with the TSMC N16 FinFET process. The TSMC-certified solution delivers predictable design closure with production-ready FinFET design automation tools, allowing engineers designing next generation semiconductors to deliver faster, more power-efficient and denser chips.
16th April 2014


Design Automation documents


Network Headlines

The source for EOL devices

Signup up to view our publications

Sign up

Signup up to view our downloads

Sign up

 

WEBENCH® Designer