Design Automation

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Altium extends benefits to subscription customers

Altium extends benefits to subscription customers
  Altium has announced extended benefits to Altium Subscription. with the release of Altium Designer 15. Altium has committed to delivering Product Updates and Maintenance Updates to the current release and Maintenance Updates to previous releases.
19th December 2014

3D rendering software module to help study comet 67P

3D rendering software module to help study comet 67P
The Qt Company, a subsidiary of Digia, is working with the ESA in order to develop a 3D rendering software module that will be used in the ESA MAPPS planning and analysing tool. First needed in the survey mission currently studying comet 67P by the Rosetta spacecraft, the ESA requires rendering algorithms that can deal with irregular bodies in addition to normal spheroid shaped planets.
19th December 2014

LPDDR4 VIP accelerates verification closure

Synopsys has announced VIP (Verification IP) for LPDDR4, based on a 100% native SystemVerilog Universal Verification Methodology (UVM) architecture to enable ease of use, ease of integration and performance. Complete with verification plans, built-in coverage and a protocol-aware memory debug environment, Verdi Protocol Analyzer, Synopsys VIP for LPDDR4 is a complete VIP solution that accelerates verification closure for designers of low power memory controllers and SoCs.
18th December 2014


Platform targets touch-enabled UIs for wearables

Designed for touch-enabled UIs, the QTouch Surface platform has been released by Atmel. Built on the QTouch capacitive touch button sensing technology, the platform features an on-chip peripheral touch controller, enabling higher performance capacitive touch on Atmel MCUs. The platform consumes less than 4µA, making it suitable for wearables and other battery-powered applications that require a capacitive touch user interface.
18th December 2014

Software supports hardened floating point DSP blocks

Providing immediate support for the hardened floating point DSP blocks integrated in Arria 10 FPGAs and SoCs, Altera has released version 14.1 of its Quartus II software. Three unique DSP design entry flows enables users to achieve up to an industry-leading 1.5TFLOPS of DSP performance. The software also includes optimisations to improve designer productivity by accelerating Arria 10 FPGA and SoC design time.
17th December 2014

UI development framework targets wearable & IoT devices

The latest version of Qt Company’s cross-platform application and UI development framework is now available for download. Enabling companies execute a future-proof multi-screen and IoT strategy reaching all major desktop, embedded and mobile operating systems, the Qt 5.4 further solidifies the creation of connected devices and applications with native C++ performance. To protect developers’ freedom as it was intended by the Free Software Foundation, the framework also introduces the LGPLv3 to Qt’s licensing options.
17th December 2014

Control & debug all aspects of an embedded Linux system

A software development environment for embedded Linux developers, MULTI for Linux, has been introduced by Green Hills Software. This enables developers to seamlessly control and debug all aspects of an embedded Linux system from a single tool, including the Linux kernel, kernel threads, user mode threads and processes and interrupt service routines.
16th December 2014

Industry’s lowest power 'Always Listening' voice recognition

Targeting the growing IoT category of devices, Lattice Semiconductor has announced the availability of human voice detection and command recognition IP for smartphones and other portable devices. Implemented in the iCE40 family of mobile FPGAs, the IPs enable manufacturers to improve the user experience of their mobile devices with voice activation capabilities and maximise battery life by minimising false wake-up triggers to the processor.
15th December 2014

3D graphics application is FASTER

STMicroelectronics has tested and validated an experimental 3D-graphics application based on ray-tracing technology that had been implemented on an ARM-processor-based test chip attached to an FPGA. The effort for ‘Facilitating Analysis and Synthesis Technologies For Effective Reconfiguation’ (FASTER), which was partially funded by the European Union Seventh Framework Programme (FP7 IC T 287804), was performed as part of a tight R&D cooperation with Politecnico di Milano and the Foundation for Research and Technology - Hellas.
11th December 2014

Software suite reduces 5G system design time

Software suite reduces 5G system design time
NI has developed the LabVIEW Communications System Design Suite to cut the time to produce a 5G system prototype by half. The suite combines software defined radio (SDR) hardware with a comprehensive software design flow. Wireless prototyping was previously undertaken by separate design teams using disparate design tools. The LabVIEW Communications environment enables the entire design team to map an idea from algorithm to FPGA using a single high-level representation.
10th December 2014


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