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Tensilica 
Tensilica Introduces Third Generation Diamond Standard Controllers Optimized for Low Power, High Performance ApplicationsTensilica Inc. today introduced its third generation of Diamond Standard controllers. This family of five upward-compatible processor cores is based on a common Xtensa architecture and provides the price/performance/low-power required for a wide range of embedded control functions in today's compute-intensive dataplane functions. Improvements in this third generation of Diamond Standard controllers deliver up to 15 percent faster clock speed, up to 20 percent smaller die area and up to 15 percent less power consumption. mimoOn Joins Roster of Tensilica's Rapidly Expanding Xtensions Program for Fast LTE/4G DevelopmentTensilica announced that its ConnX Baseband Engine comes with the broad ecosystem support of Tensilica's Xtensions(TM) Partner Network , including the newest Xtensions member, mimoOn. (see separate press release). Tensilica's Xtensions Partner Program brings its LTE (Long Term Evolution) baseband handset and base station design customers a robust infrastructure of top-tier partners in SOC (system-on-chip) design-critical areas such as LTE physical layer software solutions, system level modeling, real time operating systems emulation, and design services. Tensilica and mimoOn Partner for LTE Baseband Handset SolutionsmimoOn, a pioneer in LTE software implementations for programmable radio platforms, and Tensilica® Inc., a leader in programmable and efficient IP cores for advanced mobile wireless SOCs (system-on-chips), today announced a partnership to offer best-in-class LTE solutions for mobile wireless radios based on mimoOn's mi!MobilePHY software and Tensilica's newly announced ConnX Baseband Engine (BBE16) and ConnX Atlas LTE Reference Design. Tensilica: HiSilicon, a Division of Huawei, Licenses Tensilica's Xtensa Dataplane Processor and ConnX DSP IP CoresTensilica announced today that HiSilicon Technologies has licensed Tensilica's Xtensa® customizable dataplane processors (DPUs) and ConnX(TM) DSP (digital signal processing) semiconductor IP cores. HiSilicon will use Tensilica's DPUs and DSPs in network equipment chip design. Tensilica Introduces ConnX Atlas Reference Architecture for LTETensilica introduced its ConnX Atlas LTE (Long-Term Evolution) reference platform, a heterogeneous seven-core reference architecture for a complete multi-standard programmable radio for advanced mobile devices. Atlas is designed to support the 3GPP (3rd Generation Partnership Project) LTE standard, as well as other complementary standards such as HSPA+ (Evolved High-Speed Packet Access), in a single platform. No additional hardwired hardware blocks are required, even for the computationally complex turbo decoder at 154 Mbps downstream data rates. Tensilica - Second Generation ConnX BaseBand Engine DSP for Demanding Algorithms for LTE/4G Wireless Handsets and Base StationsTensilica introduced ConnX BBE16, its second generation baseband engine for LTE and 4G baseband SOC designs. ConnX BBE16's 16-way MAC architecture is optimized for the most demanding wireless DSP tasks, including OFDM algorithms and FFT, FIR, IIR, and matrix computation. Tensilica Introduces HiFi EP DSP Core for High Quality Audio in Home Entertainment and Smartphone ApplicationsBuilding on the success of its HiFi 2 Audio DSP, the leading architecture for audio in system-on-chip (SOC) designs, Tensilica today introduced HiFi EP, a superset of the HiFi 2 architecture that is optimized for simultaneous multichannel codec support and/or continuously expanding audio pre and post processing in home entertainment products such as Blu-ray Disc players, digital television (DTV), and Smartphones. Tensilica Demonstrates Success in Audio/Video and Broadband Communications at CES 2010A host of products based on Tensilica's dataplane processors will be demonstrated at this year's Consumer Electronics Show, January 7-10 in Las Vegas. These Tensilica-enabled products include some of the most advanced, innovative consumer devices, including Blu-ray Disc players, Bluetooth-enabled devices, LCD TVs, cellular phones, WiFi- and W-USB-enabled notebook computers, wireless HDMI, handheld games, and inkjet and laser printers. Tensilica will showcase its leading-edge audio, video and baseband communication IP cores, including the popular HiFi 2 Audio Engine running on the Android platform in collaboration with MIPS Technologies, in the South Hall of the Las Vegas Convention Center, suite South 4 35567MP. To schedule an appointment to see the demo, please contact paula@tensilica.com. Tensilica Delivers New Design Flow Support for Synopsys' Galaxy Implementation Platform TechnologiesTensilica, Inc. today announced that it now provides out-of-the-box automated design flow support for key technologies within Synopsys' Galaxy Implementation Platform, including DC Ultra RTL synthesis and IC Compiler place-and-route, for Tensilica's new Xtensa 8 and Xtensa LX3 dataplane processors (DPUs). This latest design flow provides up to 15% improvement in processor speed, area and power, in addition to faster design closure over previous Synopsys-based design flows, thus offering immediate benefits to Tensilica customers. Top EDA Companies Endorse Tensilica's Pin-Level SystemC ModelsTensilica has announced that it has expanded the range of processor modeling options with the introduction of pin-level SystemC models of its Xtensa customizable dataplane processors (DPUs). With this novel feature, Tensilica now offers the widest array of modeling choices of any provider of licensable microprocessor or DSP (digital signal processing) IP cores. Tensilica Announces Enhanced Tools for Dataplane Processor Design and Software DevelopmentTensilica has announced its eighth generation tools that further automate customized Xtensa dataplane processor (DPU) design and speed software development. Improvements cover improved compiler technology, better multi-core system simulation and profiling, an upgraded integrated development environment (IDE), and pin-level co-simulation with RTL. Tensilica DPU Family Delivers 10 GigaMAC/sec DSP Performance, Tops 1 GHz MarkTensilica has introduced the Xtensa LX3 high-performance dataplane processor (DPU) core optimized for digital signal processing (DSP) and control in the system-on-chip (SOC) dataplane. The Xtensa LX3 DPU offers the industry's widest range of pre-verified DSP options ranging from a simple floating point accelerator to a 16-MAC (multiply accumulator) vector DSP powerhouse. Ultra-Low Power Dataplane Processor Core for Deeply Embedded ControlTensilica has introduced the Xtensa 8 customizable processor, the eighth generation of its low-power dataplane processor cores (DPUs). The Xtensa 8 processor core starts at a size of just 15,000 gates, consuming less than 0.05mm2 in 40nm process technology - making it one of the smallest licensable controller cores on the market. With power dissipation starting at just 12 µW/MHz, it's also one of the lowest power licensable 32-bit architectures. 
Tensilica - New DSP Engine Combines Outstanding Performance, Compact Size, and Easy ProgrammabilityTensilica has introduced the high-performance, small, low-power ConnX D2 16-bit dual-MAC (Multiply Accumulator) DSP (Digital Signal Processor) engine for its proven Xtensa LX dataplane processor cores for SOC (System-on-Chip) designs. The ConnX D2 DSP engine provides uncompromised performance from C code, unlike many other DSPs that require time consuming assembly coding for maximum performance. This means that virtually any C program, including those written with C intrinsic functions for the TI C6x family or ITU (International Telecommunications Union) reference code, can run unmodified and with excellent performance on the ConnX D2 DSP engine. Blue Wonder Communications to Develop LTE Baseband IP Using Multiple Optimized Tensilica Dataplane ProcessorsTensilica has announced that Blue Wonder Communications has licensed Tensilica's Xtensa dataplane processors (DPUs) for an LTE (Long-Term Evolution) embedded broadband modem design. Blue Wonder Communications is an independent design house developing mobile broadband solutions for the telecommunications and semiconductor industries. Many of the employees at Blue Wonder Communications previously were employed by NXP's wireless division and have extensive expertise in high-data-rate wireless design. 
Tensilica - High-Performance ConnX Baseband Engine for LTE and 4G Wireless DSP Handsets and Base StationsTensilica has announced the first member of its new ConnX family of DSP cores for system-on-chip design. The ConnX Baseband Engine enables efficient baseband processing for 3G, LTE (Long-Term Evolution) and 4G wireless equipment with its scalable, high-performance DSP architecture that provides industry leading computational throughput of 16 18-bit MACs per cycle. The ConnX Baseband Engine features an optimized instruction set, high memory bandwidth, scalable clustering, and efficient compiler support with an easy programming model for SIMD (Single Instruction, Multiple Data) vectorization and other DSP functions. This high performance core is also an effective solution for multi-standard fixed and mobile DTV broadcast demodulators. High-Performance ConnX Communications DSP Family for LTE and 4G SOC DesignsTensilica has introduced a family of high-performance communications DSP IP cores – the ConnX DSP family – that include standard cores, click-box configurable options or a starting point for customized Xtensa LX DPUs (dataplane processor units) for SOC designs. The newest member of the family, the ConnX Baseband Engine – see separate press release – provides industry leading computational throughput (sixteen 18-bit MACs per cycle) due to its application-specific instruction set optimized for compute-intensive LTE (Long-term Evolution) and 4G wireless base stations. Tensilica plans other ConnX family members for the low-power requirements of the handset market. TranSwitch Integrates Xtensa ProcessorsTensilica has announced that TranSwitch Corporation has integrated two Xtensa customizable Dataplane Processor Units (DPUs) into its recently introduced Atlanta 2000 gigabit-rate communications processor product family. Atlanta 2000 offers robust gateway routing, security and VoIP capabilities with unmatched performance and power efficiency, enabling customers to develop the next generation of high-performance green networking products and services for residential, small office/home office, and small-to-medium-sized business CPE (customer premise equipment) applications. SiliconXpress is latest Tensilica Design CenterTensilica has announced that SiliconXpress has become its newest authorized design center. SiliconXpress is a fabless chip provider, headquartered in Lubbock, Texas, offering one-stop design, fabrication, test, and packaging services. Tensilica is a major semiconductor IP supplier specializing in dataplane processor cores which are a combination of CPU and DSP that can be rapidly customized to provide 10-100x the performance of standard CPUs and DSPs. HiFi 2 Audio DSP from Tensilica supports HE AAC by DolbyTensilica has announced the immediate availability of the Digital Radio Mondiale (DRM) decoder on its popular HiFi 2 Audio DSP, which can be easily integrated into system-on-chip (SOC) designs. The implementation is based on software developed by Dolby and has passed Dolby's certification procedure. Now designers of digital radio systems can use one processor core -- Tensilica's HiFi 2 Audio DSP -- to run all decoders required throughout the world for digital radio, enabling a universal worldwide digital radio receiver. Tensilica's HiFi 2 Audio DSP already has support for four other terrestrial and satellite standards: DAB, DAB+, HD Radio, and XM Radio. Tensilica Adds Mahesh Venkatraman as New VP of Marketing Vertical SegmentsTensilica has announced that Mahesh Venkatraman has joined Tensilica as vice president of marketing, vertical segments. In this new position, Venkatraman will report to company president and CEO, Jack Guedj, and is responsible for the marketing, strategic business development, and partnerships for audio, video, and baseband digital signal processing vertical segments. Tensilica Enables Easy Addition of Bluetooth Audio to Portable DevicesTensilica has announced the immediate availability of the Bluetooth sub-band codec (SBC) decoder and encoder for its popular HiFi 2 Audio DSP, which can easily be integrated into system-on-chip (SOC) designs. Now designers of cellular phones, portable music players and other devices can easily design in Bluetooth capabilities, along with over 50 other audio standards already available, that run on the HiFi 2 Audio DSP. Tensilica Demonstrates Audio, Video and Next-Generation Baseband DSP in BarcelonaTensilica will demonstrate its audio, video and baseband DSP (digital signal processing) processor cores for wireless mobile devices and base station systems at the Mobile World Congress (MWC) exhibition in Barcelona next week, February 16-19. Major systems and semiconductor companies will be showcasing products using Tensilica's technology, and many 4G/LTE, PicoCell and FemtoCell, WiFi, mobile digital radio, and mobile digital TV baseband communications SOC (system-on-chip) designs are now in progress based on Tensilica's customizable dataplane processors. UpZide Becomes Tensilica Authorized Software Design CenterTensilica has announced that UpZide Technologies AB is now an authorized Tensilica Software Design Center. Over the past three years, UpZide has worked extensively on designs with Tensilica's Xtensa customizable processors, and have strong expertise in optimizing these processors for VDSL2 (very high bit rate digital subscriber line), the most advanced standard for DSL communications. UpZide is now available to help other companies with their wireless datapath or baseband designs, including LTE (long-term evolution) and UWB (ultra wideband). Tensilica's Diamond Standard 330HiFi Audio DSP Licensed by FujitsuTensilica has announced that its Diamond Standard 330HiFi Audio DSP (digital signal processor) has been licensed by Fujitsu Microelectronics Limited for use in a customer's portable consumer electronics design. Tensilica Enables Single Audio Core Blu-ray Disc Player SOCsTensilica has announced that it will demonstrate DTS-HD Master Audio Lossless decoding on the HiFi 2 Audio DSP (digital signal processor), the industry's lowest power, most area efficient audio processor core, at the Consumer Electronics Show in Las Vegas, January 8-11, 2009. The HiFi 2 DSP offers significant cost savings and a simplified programming model, as all Blu-ray audio processing can be done in one core, unlike other solutions that require two or more cores. Tensilica Adds RealAudio Decoder Support for HiFi 2 Audio DSPsTensilica has announced that it has it has ported the RealAudio 8, 9, and 10 decoders from digital entertainment services company RealNetworks, Inc. to the HiFi 2 Audio DSP, the industry's leading licensable audio DSP. RealAudio utilizes advanced audio compression techniques to allow users to achieve high quality sound in a wide bandwidth range, and is the preferred media format for many users of cellular phones, portable media players, and mobile Internet devices. MegaChips Becomes Tensilica Authorized Design CentreTensilica has announced that MegaChips Corporation, of Osaka, Japan, has become an authorized Tensilica design center. Companies needing SOC design services in Japan can take advantage of MegaChips' expertise in the design of video and imaging products as well as communications products. Sibridge Technologies Becomes Tensilica Authorized Design CentreTensilica has announced that Sibridge Technologies has become an authorized Tensilica design center, supporting customers of both the Xtensa configurable processors and the Diamond Standard processor cores. Sibridge has offices in Fremont, CA, and Ahmedabad, India, and supports a number of global electronics companies. P-Product Becomes Tensilica Authorized Software Design CenterTensilica has announced that P-Product, of Needham, MA, has joined Tensilica's Xtensions Partner network as an authorized software design center, specializing in efficient implementations of digital signal processing (DSP) software. P-Product has extensive expertise in audio and video as well as in WiMAX and LTE. P-Product has already ported multiple audio software modules to Tensilica's popular HiFi 2 Audio Engine. Tensilica HiFi 2 Audio DSP Supports aacPlus by DolbyTensilica has announced that it has added the aacPlus by Dolby for Digital Audio Broadcasting (DAB+) decoder to its audio codec library for its Xtensa® HiFi 2 Audio DSP, one of the most popular commercial audio cores for system-on-chip (SOC) designs. Tensilica Ports RealVideo Codec to 388VDO Video EngineTensilica®, Inc. announced that it has ported the RealVideo codec from digital entertainment services company RealNetworks®, Inc. (RNWK) to the 388VDO Video Engine, increasing the versatility of this popular video chip subsystem. The RealVideo codec expands the applicability of Tensilica's 388VDO video processor to products that efficiently display Internet content on everything from mobile devices to extended standard definition DTV. Tensilica's Xtensa Customisable Processor Used in Panasonic Mobile's Wireless Baseband ProcessorTensilica,® Inc. today announced that Panasonic Mobile Communications Co. Ltd. has licensed the Xtensa® LX2 customisable processor core for a baseband processor integrated circuit for mobile phones. Now Panasonic Mobile will develop several different configurations of the Xtensa processor. Tensilica's Xtensa Customizable Processor Used in Panasonic Mobile's Wireless Baseband ProcessorTensilica,® Inc. today announced that Panasonic Mobile Communications Co. Ltd. has licensed the Xtensa® LX2 customizable processor core for a baseband processor integrated circuit for mobile phones. Now Panasonic Mobile will develop several different configurations of the Xtensa processor. Fujitsu Adopts Tensilica¹s Xtensa ProcessorTensilica has announced that Fujitsu has licensed the Xtensa LX2 customizable processor core as the baseband processor for Fujitsu's mobile phone. Tensilica Adds AMR WB+ Audio / Speech Decoder and Encoder to HiFi 2 Audio Processor Software LibraryTensilica has announced that it has added the AMR WB+ audio / speech decoder and encoder to the software library for its HiFi 2 audio processor. The AMR WB+ (Adaptive Multi Rate Wideband plus) speech codec improves on the available AMR Wideband speech codec by adding support for stereo signals and higher sampling rates, providing higher quality at low bit rates. Tensilica's Xtensa Processor Core Adopted by NEC For Mobile Phone SOCTensilica has announced that NEC Corporation of Tokyo, Japan, has licensed the Xtensa LX2 customizable processor core for NEC's Mobile Phone SOC (system-on-chip). NEC will develop Mobile Phone SOCs using several different configurations of the Xtensa processor. Tensilica Confirms New Intel Media Processor for Consumer Electronics Devices Uses Company's HiFi 2 Audio ProcessorAt the Intel Developer Forum in San Francisco yesterday, Tensilica announced that the new Intel Media Processor CE 3100 (formerly codenamed "Canmore") for Internet-connected CE devices includes Tensilica's HiFi 2 audio processor. Tensilica's HiFi 2 processor is specifically optimized to efficiently run over 50 audio software packages, including AACPlus, MP3, SRS TruSurround HD, WMA, and G.7xx Voice codecs, along with the complete suites of Dolby and DTS codecs required for set-top box and Blu-ray Disc applications. Tensilica Appoints Jack Guedj as New President and CEOExpanding its executive team with the talented leadership required to take the company into its next phase of growth, Tensilica, Inc. today announced it has appointed Dr. Jack Guedj, Ph.D. as the company's president and chief executive officer (CEO). Guedj has extensive experience as a senior executive with a variety of fast-growing start-ups and high-profile semiconductor companies focused in high-performance communications and multimedia. He succeeds Dr. Chris Rowen, founder of Tensilica, who is now the company's chief technology officer (CTO), driving advanced processor technology and applications in close partnership with Tensilica's strategic customers. Rowen will continue to serve on the Tensilica board of directors. Triductor Licenses Tensilica Diamond Standard 212GP Processor CoreTensilica has announced that Triductor Technology, of Santa Clara, CA, and Suzhou, China, has signed a second license for the Diamond Standard 212GP general-purpose processor core and has completed a second design tape out. Triductor has used the Diamond 212GP processor as the system controller for VDSL2 design for both the customer premise (CPE) and central office (CO) designs. The Diamond 212GP is an area-efficient, low-power, fully synthesizable 32-bit RISC processor core that also supports basic single-MAC DSP functions. Tensilica Announces Open Source Linux Emphasis, Broadens Processor Core Ecosystem with New Linux PartnersTimeSys and Embedded AlleyTensilica has announced that Embedded Linux 2.6 and GNU tools based on GCC 4.2, both available at www.linux-xtensa.org, is now backed by two well-respected Linux industry partners. Embedded Alley Solutions, Inc. of San Jose, CA, provides Platform Optimized Linux Solutions, Linux consulting services and training. Timesys, of Pittsburgh, PA, is providing subscriptions to LinuxLink for Tensilica customers to access embedded software, tools, documentation, and support and Timestorm: an Eclipse-based IDE that provides a point-and-click interface for kernel and root filesystem configuration, profiling, testing, and debugging. Tensilica's GUI Cuts Chip Energy ConsumptionTensilica has announced that it has added a new graphical user interface (GUI) to its popular Xenergy estimator, a unique energy estimator for both Xtensa configurable processors and Diamond Standard processors. This first of its kind tool allows software developers to evaluate trade-offs, so their software can be optimized for power, and lets hardware designers optimize the design of Xtensa configurable processors for total energy consumption. Tensilica Supports MPEG-4 AAC-LC and aacPlus Multi-Channel Decoders for 7.1 Surround SoundTensilica has become the first processor IP company to announce the approval and availability of MPEG-4 AAC-LC, aacPlus v1, and v2 multichannel decoder implementations from Dolby Laboratories, Inc. These three multichannel decoders provide up to 7.1-channel surround sound for home entertainment devices. They are available now for the Tensilica HiFi 2 Audio Engine, the most popular audio architecture for system-on-chip (SOC) design. Tensilica's Xtensa Processors Enable Next-Generation Mobile HD Radio TechnologyTensilica has announced that its Xtensa configurable processor has been designed into the baseband processor in Samsung EM's HD Radio chipset. The baseband processor, based on a design by iBiquity Digital Corporation, the developer and licensor of HD Radio technology and a Tensilica processor reseller, integrates the memory, SDRAM and flash in a system-in-package measuring just 9 x 9 mm. WiLinx Licenses Tensilica's Xtensa LX2 Processor Core for Low-Power UWB ChipsTensilica has announced that WiLinx, a Los Angeles based fabless semiconductor company, has licensed the Xtensa LX2 configurable processor for its low-power True-UWB single chip CMOS (Complementary Metal-Oxide-Semiconductor) solutions. WiLinx True-UWB product offers 7 GHz (from 3 to 10 GHz) of air spectrum as the key enabler for worldwide adoption of UWB into the cellular phone handsets, PCs, PC peripherals and consumer electronics devices. Tensilica and NuFront to Show T-MMB Mobile TV Solution at China's IIC 2008 ShowsTensilica and NuFront have announced that the two companies will jointly exhibit at the IIC-China 2008 exhibitions March 3-4, 2008, in Shenzhen (booth: 2K41) and March 10-11, 2008, in Shanghai (booth: 4S41). Using Tensilica's configurable processor technology, NuFront developed, and has gone into mass production with, a T-MMB (terrestrial-mobile multimedia broadcasting) mobile baseband DSP (digital signal processor). By watching mobile TV on a T-MMB phone, visitors will be able to experience NuFront's technology in action. Tensilica Configurable Processors Used in Stanford Smart Memories ProjectTensilica Inc. has announced that Stanford University's Smart Memories Project used Tensilica's Xtensa LX2 configurable processor to develop a multiprocessor computing infrastructure for next generation applications. The Stanford Smart Memories Project has developed a prototype system-on-chip (SOC) design that provides the user the ability to program both the processor and the memory system of a chip-level multiprocessor. Using Tensilica allowed the Smart Memory team to focus on creating a flexible memory system that supports many different memory models, including message passing, coherent shared memory and transactional memory. The design is currently being evaluated for possible commercial deployment by a couple of large semiconductor companies. Tensilica Adds Support for High-Speed, Hardware-Based Processor Simulations Using Avnet's Xilinx Virtex-4 LX200 Development KitTensilica has announced it has added support for Avnet's Xilinx Virtex-4 LX200 Development Kit for high-speed hardware-based simulations of its Xtensa configurable and Diamond Standard processor families. Now software developers can choose between the cost-effective Avnet LX60 board and the high-capacity Avnet LX200 board to speed their software design, debug and program optimization processes. Upzide Expands Business Relationship with Tensilica, Developing Multi-Core VDSL2 Modem ChipsetUpZide Labs AB and Tensilica, Inc., today announced an expanded business relationship under which UpZide will take their reference Vectorized VDSL2 (second generation Very high-speed Digital Subscriber Line) design to market in a chipset using over 50 Xtensa LX2 configurable processors. Vectorized VDSL2 technology is seen as key to delivering VoIP (voice over Internet protocol), VoD (video on demand) and HDTV (high-definition television) simultaneously over standard telephone lines. Innovative Tensilica-Based Products on Display at CES 2008Tensilica, Inc. today announced that over 30 companies that either license Tensilica's popular processor cores or use merchant market semiconductor products that include Tensilica's cores will be displaying products at this week's International Consumer Electronics Show (CES). These Tensilica-enabled products include some of the most advanced, innovative consumer devices, including LCD TVs, cellular phones, WiFi-enabled notebook computers, inkjet and laser printers. Tensilica Adds to Xtensa HiFi 2 AudioTensilica has announced that it has added the Dolby Digital Consumer Encoder (DDCE) and Dolby Digital Compatible Output (DDCO) 5.1-channel encoders to its audio codec library for the Xtensa HiFi 2 Audio Engine, one of the most popular commercial audio cores for system-on-chip (SOC) designs. These encoders enable manufacturers to design consumer devices, including Blu-ray Disc players, HD DVD players, portable devices and camcorders, which support Dolby 5.1-channel surround sound as well as next-generation high-definition (HD) video technologies. Tensilica Offers Integrated Real-Time Trace Support to Xtensa Configurable and Diamond Standard Processor CoresTensilica has announced that it has added an optional full-speed, non-intrusive instruction trace capability to all of its Diamond Standard and Xtensa configurable processor cores. Tensilica's TRAX-PC processor trace capture macrocell is Nexus 5001 compatible and ideal for debugging complex, challenging real-time applications such as engine and motor control. Software control and use of the on-chip TRAX hardware is fully integrated into Tensilica's Xplorer(TM) integrated design environment (IDE) so software engineers can easily develop and debug programs while using the TRAX-PC trace macrocell. DS2 Licenses Tensilica's Xtensa Processor for 200 Mbps Powerline ChipsetTensilica has announced that Design of Systems on Silicon S.A. (DS2) has licensed Tensilica's Xtensa configurable processor to use as a controller in a 200 Mbps powerline chipset. This chipset enables broadband and networking in homes over power lines, coaxial cable and telephone wire. Partnership Delivers Free Diamond Processors on Free Mask Charge ASICsTensilica and eASIC Corporation have announced a partnership to remove the cost barriers for developing custom embedded System-on-a-Chip. (SoCs). Through this partnership eASIC now provides free access to Tensilica's Diamond Standard microprocessor and DSP cores for its free mask charge, no-minimum order ASICs. This unique combination enables embedded system designers to develop Diamond processor-based SoCs for applications in any production volume. Designers will now be able to develop customized, highly differentiated ASIC solutions at a lower cost than FPGA-based embedded systems. CoWare and Tensilica Integrate Diamond Standard 106Micro with CoWare ESL 2.0 TechnologyCoWare, Inc., and Tensilica, Inc., today announced the integration of Tensilica's Diamond Standard 106Micro, the smallest licensable 32-bit processor core, with CoWare Platform Architect. The integration provides designers with the first and most productive ESL 2.0 solution for platform architecture design, platform verification, and software development using Tensilica's processor core with the smallest area, lowest power, and highest performance on the market. DTS Audio Technologies for Blu-ray Disc and HD DVDTensilica ®, Inc. and DTS, Inc. today announced that the two companies have entered into an agreement for Tensilica to provide leading-edge DTS technologies for both Blu-ray Disc and HD DVD and other high end consumer audio applications with Tensilica's HiFi 2 Audio Engine, the most popular commercial audio DSP core for system-on-chip (SOC) designs. Processor Core Family Offers New Features and Memory Power Reductions Up to 30%Tensilica has announced that it has enhanced its successful Diamond Standard processor product line, the lowest-power, most area-efficient and highest-performance licensable cores on the market. The new second-generation Diamond Standard processors include several new features including additional multiplier and divider functional units, several hardware optimizations that lower memory power by up to 30%, and an optional bridge to AXI-based AMBA systems. 
Smallest licensable 32-bit processor core from TensilicaTensilica has introduced the industry's smallest licensable 32-bit processor core based on an industry-standard architecture. The new Diamond Standard 106Micro core takes up only 0.26 mm2 in a 130-nm G process and only 0.13 mm2 in a 90-nm G process, which makes it smaller than the ARM7 or Cortex-M3 cores, yet at 1.22 Dhrystone MIPS/MHz, it delivers higher performance than the ARM9E cores. Tensilica's Diamond Standard 108Mini selected for Chip That Ensures High-Quality Home Audio-Video NetworkingTensilica has announced that Valens Semiconductor, an Israeli start-up, has selected the Diamond Standard 108Mini as the controller for a SOC (system-on-chip) design that will enable high-quality transmission of audio and video in a home networking environment. We are designing a chip that will enable high quality transmission of audio and video in a home networking environment, stated Dror Jerushalmi, CEO of Valens. We picked the Diamond Standard 108Mini as our central controller based on the high quality Diamond Standard software tool environment, the low-power advantages of the Diamond 108Mini processor compared to conventional alternatives, and because the Diamond 108Mini core had the performance-headroom we needed. Tensilica Ports MPEG-4 BSAC Decoder to HiFi 2 Audio EngineTensilica has announced that it has added a MPEG-4 Bit Sliced Arithmetic Coding decoder to it's HiFi 2 Audio Engine, the most popular commercial audio core for system-on-chip designs. This BSAC decoder is used in Digital Multimedia Broadcasting applications, which allow radio, TV and datacasting to mobile devices, particularly mobile phones. MediaPhy Licenses Tensilica's Diamond Standard 108Mini Processor CoreTensilica has announced that MediaPhy Corporation, of San Jose, Calif., has licensed the Diamond Standard 108Mini, the low power 32-bit processor core for SOC design. MediaPhy will use the Diamond Standard 108Mini in its next generation mobile audio and video entertainment designs. P-Product Joins Tensilica's Partner Network; Ports Codecs to the HiFi 2 Audio EngineTensilica(R), Inc. today announced that P-Product has joined its Xtensions partner network. P-Product has already ported audio software to Tensilica's HiFi 2 Audio Engine and has significant expertise in audio and video software porting. Two Korean Universities Licence Tensilica's Xtensa Configurable ProcessorTensilica has announced that two Korean universities have licensed its Xtensa configurable processor. The CoSoC (Center of System on Chip design technology) of Seoul National University is using the Xtensa processor in the classroom and has announced their third annual SOC (system-on-chip) design contest, which will, for the first time, accept designs that use Xtensa processors. The KAIST (Korea Advanced Institute of Science and Technology) has licensed the Xtensa configurable processor to develop multimedia SOC designs. MP3 Decoder Under 6 MHz is a first says TensilicaTensilica has announced that it has optimized the MP3 decoder for its Xtensa HiFi 2 Audio Engine and Diamond Standard 330HiFi processor core. This MP3 decoder now runs at the lowest power and is the most efficient in the industry says Tensilica, requiring just 5.7 MHz when running at 128Kbps, 44.1 KHz and dissipating 0.45 mW in TSMC's 65nm LP process (including memories). This makes Tensilica's Xtensa HiFi 2 Audio Engine ideal for adding MP3 playback to cellular phones, where current carrier requirements are for 100 hours of playback time on a battery charge, and increasing to 200 hours in the near future. Tensilica Offers Dolby Digital Plus 7.1-Channel Decoder for HD DVD Players, Blu-ray Disc Players, and Set-Top BoxesTensilica®, Inc. today announced that it will deliver a Dolby® Digital Plus 7.1-channel decoder designed for HD DVD players, Blu-ray Disc™ players, and set-top boxes. Tensilica will also offer a Dolby Digital Plus 5.1-channel decoder/converter to ensure compatibility with most existing home theater systems equipped with coaxial or optical digital audio inputs. These two optimized decoders have been approved by Dolby for use with Tensilica's popular HiFi 2 Audio Engine for Xtensa® processors and the Diamond Standard 330HiFi audio processor core. Probe Supports Tensilica's ProcessorsByteTools and Tensilica have announced that ByteTools' Catapult JTAG probes are available for Tensilica's Diamond Standard and Xtensa configurable processors. The high-performance, low-cost Catapult devices work out-of-the-box with Tensilica's software development tools, meaning that users need not install any additional software. Catapult probes interface to the standard XOCD 14-pin JTAG header, with Catapult EJ-1 offering an Ethernet host interface, and Catapult UJ-1 offering a USB host interface. Tallika Becomes Tensilica Configurable Processor Authorized Design CenterTensilica, Inc. has announced that Tallika Corp is now an authorized Design Center partner for customers using the Xtensa configurable processor in their system-on-chip (SOC) designs. Tallika offers concept-to-production professional services serving OEMs in networking, consumer, storage and computing markets as well as digital and mixed-signal semiconductor companies. Enuclia Picks Tensilica's HiFi 2 Audio Engine For Flat Panel TV ChipsTensilica has announced that Enuclia Semiconductor has selected its Xtensa LX processor with the HiFi 2 Audio Engine for its next-generation flat-panel TV integrated circuits. Enuclia is developing chips that produce the best possible picture on analog and digital televisions whether they are displaying standard or high-definition content. Estimator Tool Guides Designers to Energy-Efficient SOC ArchitecturesTo address the growing need to pro-actively reduce power consumption in embedded systems, Tensilica has announced the Xenergy estimator, an energy estimator for both Xtensa configurable processor and Diamond Standard processor users. By using the Xenergy tool to optimize for energy early in the SOC (System On Chip) design cycle, designers can cut processor and local memory energy requirements by up to half by making intelligent design trade-offs. Sony Renews License for Tensilica's Xtensa LX2 Configurable ProcessorTensilica, Inc. has announced that Sony Corporation has renewed and updated its license for Tensilica's Xtensa LX2 configurable processor. Fast Functional Simulator is 40 to 80 times faster than existing Tensilica Instruction Set SimulatorTensilica has announced its new TurboXim fast functional simulator, which is 40 to 80 times faster than its proven cycle-accurate ISS (Instruction Set Simulator). Tensilica also introduced its ability to automatically generate SystemC models to match all possible configurations of its Xtensa configurable processors and Diamond Standard series processors. These introductions significantly speed ESL (embedded system level) design and architectural exploration for SOC (system-on-chip) design using one or more Xtensa configurable processors or Diamond Standard processors. eInfochips Becomes Authorized Tensilica Processor Design CenterTensilica has announced that eInfochips has joined the Tensilica Xtensions Design Center Partner Program and is offering system-on-chip design services for customers using Tensilica's Xtensa configurable processors or Diamond Standard processor cores. eInfochips has design centers in the US and India and a proven track record in design services ranging from silicon design and verification to physical design as well as board design and embedded firmware development. PnpNetwork Licenses two Diamond Standard processor coresTensilica has announced that PnpNetwork Technologies, Inc., of Seoul, Korea, has licensed two Diamond Standard processor cores for their digital mobile broadcasting chip designs for mobile consumer broadcast TV applications and video-enabled handset designs. PnpNetwork will use the Diamond Standard 330HiFi for high-quality audio processing and the Diamond Standard 212GP as a control processor for their chip designs. WiQuest Licenses Tensilica's Xtensa Processor for Low-Power Wireless USB Chip DesignTensilica Inc. today announced that WiQuest Communications, Inc. has deployed the Xtensa configurable processor in WiQuest's WQST110 ultrawideband (UWB) wireless USB chip design. |
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