Communications

High Sensitivity Limiting Post Amplifiers unveiled by Micrel

19th July 2013
ES Admin
0
The SY88053CL and SY88063CL limiting post amplifiers have been launched by Micrel. The devices are ideal for FTTH XGPON and 10GEPON OLT applications supporting the build out of next generation PON networks. This product family is also suitable for use in fiber optic transceiver modules for multi-rate applications up to 12.5Gbps supporting Ethernet, Fibre Channel, OTN, and CPRI/OBSAI data rates.
These new devices offer an impressive number of features including a new level of high bandwidth, high input sensitivity with programmable, wide range SD Assert and LOS De-Assert threshold levels, 4dB of electrical hysteresis, and stable SD Assert and LOS De-Assert timing to meet the stringent requirements of next generation PON networks, stated Tom Kapucija, director of marketing for the high speed communications business, Micrel. These features enable link efficiency optimization with increased system reach, higher link up-time and higher payload bandwidth.

As the demand for more data at higher speeds increases, carriers need to meet this demand by upgrading their line-side equipment and revamping their networks. Micrel continues its effort in addressing this demand at the device level. Our new optical limiting amplifiers deliver speed, performance, and features that are critical to solving technical difficulties facing next generation FTTH, Enterprise, and transport networks, stated Rami Kanama, vice president for the timing and communications business group. With increased link efficiency, system operators can achieve higher data transmission performance and potentially reduce carriers' CapEx and OpEx.

Both devices incorporate fast SD Assert and LOS De-Assert times across the entire differential input voltage range of 5mVPP to 1800mVPP which enables improved link efficiency and optimization. Electrical hysteresis of 4dB is provided across a wide LOS/SD threshold range of 3mVPP to 30mVPP. Integrated 50 Ohm input and output impedances optimize high speed signal integrity while reducing external component counts and in turn, cost. The TTL compatible JAM input enables a SQUELCH function by routing back the LOS or SD signal.

The SY88053CL enables user adjustable decision threshold adjustment for optimized Bit Error Rate operation in noisy applications with asymmetrical noise distribution while the SY88063CL provides a user selectable Digital Offset Correction function that automatically compensates for internal device offsets in the high speed data path. Other features include multi-rate operation of 1Gbps to 12.5Gbps; selectable LOS or SD output; selectable RXOUT+ / RXOUT- signal polarity (SY88053CL); and 25ps typical rise/fall times. Improved module manufacturability and reduced cost are achieved via the increased performance margin versus current customer requirements. The enhanced link efficiency and higher data throughput are the result of higher downstream splits per node and the additional margin to the 512ns link setup budget. Extended reach and higher data throughput are achieved via optimized BER in noisy environments and compensation for asymmetrical noise profiles of EDFA or RAMAN optical amplifiers.

Both devices offer a wide power supply range of 3.3V +/-10 percent and come in an industrial temperature range of - 40-degC to +85-degC and a tiny 3mm x 3mm QFN package.

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