Communications

Avago 28nm Serializer/Deserializer achieves 32 Gbps Performance

17th July 2013
ES Admin
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Avago has today revealed that its 28nm Serializer/Deserializer core has achieved 32 Gbps performance while withstanding up to 40 dB of channel loss. This latest SerDes core not only redefines the data rate feasibility for chip-to-chip, portside and backplane interfaces, but also reflects Avago’s ongoing commitment to offer leading-edge solutions for data center and enterprise applications.
“Avago has now shipped over 350 million embedded SerDes channels in high performance ASICs and ASSPs,” said Frank Ostojic, vice president and general manager of the ASIC/ASSP Products Division at Avago. “With our latest SerDes milestone, Avago continues to provide early access to IP that enables the development of products that meet today’s requirements for ever increasing bandwidth.”

“By achieving 32G performance, Avago provides further evidence of the robustness of its SerDes technology,” said Jag Bolaria, senior analyst at The Linley Group. “Standards continue to evolve in response to the demands for increased data rates at low power. Having demonstrated this level of performance now, Avago is prepared to address future specifications.”

Avago Intellectual Property SerDes cores can be easily integrated due to their modular, multi-rate architecture, and Avago has integrated over 400 SerDes channels on a single ASIC.

The 28-nm Avago SerDes cores feature a unique decision feedback equalization architecture, resulting in a number of key performance differentiators such as low overall power, best-in-class data latency, and best-in-class jitter and crosstalk tolerance

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