MOSIS Marks Expanded Semiconductor Foundry Offerings With Shuttle Runs For Silicon-On-Insulator (SOI)

The initial 45-nm shuttle run is scheduled for September 1, 2009. IBM’s 45-nm 12S0 technology is the company’s sixth generation of leading-edge SOI technologies and the first 300mm SOI technology to be offered through the MOSIS Service. This process provides significant transistor performance improvement (up to 30 percent) over traditional bulk technology at the same lithography node. The 45-nm SOI process offers four transistor options (Regular, High Vt, Super High Vt, Ultra High Vt), in addition to up to 11 metallization layers. A range of SRAM (Static Random Access Memory) and embedded DRAM (Dynamic Random Access Memory) options are also available, as well as a number of ESD (Electrostatic Discharge) protection options and high-quality passive elements. In addition to providing excellent isolation for analog circuit performance, this SOI offering can reduce the circuit area by up to 25 percent relative to bulk CMOS, which cuts the cost of overall semiconductor content.

The first available 180-nm SOI shuttle run has successfully been completed, with the next shuttle run scheduled for September 14, 2009. The low insertion loss and high isolation makes this technology an ideal choice for components such as RF switches that perform the function of On/Off devices in wireless applications like cell phones, WiMAX and WLANs (Wireless Local Area Networks).

“MOSIS is delighted to partner with IBM to now offer SOI foundry technologies,” said Wes Hansford, Deputy Director of MOSIS. “The 180-nm 7RF SOI technology provides a very compelling alternative to GaAS (Gallium Arsenide) technology for RF switches, while the 45-nm SOI technology delivers outstanding performance while maximizing power efficiency and minimizing overall chip size for SOC (System-on-Chip) applications. By broadening our portfolio, MOSIS provides a single interface between designers and a greater range of foundry services, thereby enabling our clients with a faster and lower-cost route to market.”

“This is a natural next step for our partnership with MOSIS and makes our advanced SOI technology accessible to an even broader array of innovators,” said Regina Darmoni, IBM’s Director of Analog/Mixed Signal & Digital Foundry. “MOSIS provides IBM with additional channels to market, and we are looking forward to this further expansion of our fabrication solutions to enable a new generation of advanced devices and clients.”

Since 1981, MOSIS has fabricated more than 50,000 circuit designs for commercial firms, government agencies, and research and educational institutions around the world. MOSIS has been a partner of IBM since 2001 and today provides MPW (multi project wafer) services to enable low-cost prototyping, dedicated engineering runs, and low- to- medium-volume production through IBM’s semiconductor fabs. MOSIS has now become a significant player in the semiconductor foundry industry by providing complete foundry solutions (including IC packaging and test) that are cost effective and have strong technical support. MOSIS provides designers with a single interface to a large portfolio of semiconductor technologies and greatly simplifies the task of working with many of the leading semiconductor foundries.