Licensing agreement speeds debug and development

23rd August 2016

Movidius

Anna Flockett

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A licensing agreement has been announced between UltraSoC and Movidius, under which Movidius will incorporate UltraSoC’s semiconductor IP into its next-generation low-power machine vision Systems-On-Chip (SoCs). Movidius will combine UltraSoC’s monitoring and analytics Intellectual Property (IP) and tools, with its own MoviDebug technology, to create a powerful chip-wide debug and communications infrastructure that will support its end-to end product development flow.

“We’ve been impressed not just by the quality of UltraSoC’s architecture, but also by the ease with which we can integrate their IP against a tight timescale,” said Brendan Barry, Vice President of Engineering, of Movidius. He added that they are expecting immediate gains from the ability to use on-chip USB as the primary debug interface, a simple change which saves us time and money. “As well as providing data speeds more in keeping with our leading-edge low-power machine vision platform.”

Rupert Baines, UltraSoC CEO, commented: “Movidius is an award-winning company with a truly unique offering, which is rapidly gaining market traction. UltraSoC is proud to have been selected to support their SoC development program: they join a substantial list of customers and partners validating our on-chip monitoring approach, including Lauterbach, MIPS, and Teledyne LeCroy.”

The Movidius product range includes advanced machine intelligence algorithms, a dedicated suite of tools and libraries, and a high performance, ultra-low power chip platform, the Myriad 2 Vision Processing Unit (VPU). The company’s solutions make devices more aware, more autonomous, and more useful than ever before.

UltraSoC’s suite of silicon IP eases SoC development and facilitates the creation of value-add on-chip features, providing benefits across the chip, throughout the SoC development flow, and on into systems integration and end-product performance monitoring. It enables non-intrusive monitoring of a chip’s real-world behaviour, giving engineers an intimate understanding of the complex interactions between diverse on-chip processor blocks, custom logic, and system software.