Sanguinetti has been active in computer architecture, performance analysis, and design verification for 20 years; he is being recognized by ACM for helping to drive innovations that will sustain competitiveness in the digital age.
After working for DEC, Amdahl, ELXSI, Ardent, and NeXT computer manufacturers, he founded Chronologic Simulation in 1991 and was president until 1995. Dr. Sanguinetti was the principal architect of the Verilog Compiled Simulator (VCS), and was a major contributor to the resurgence in the use of the Verilog hardware design language (HDL) in the design community. He served on the Open Verilog International Board of Directors from 1992 to 1995 and was a major contributor to the working group which drafted the specification for the IEEE 1364 Verilog standard.
After Chronologic, he co-founded CynApps™, Inc., in 1997. It merged with Chronology™ Corporation in 2000 to form Forte Design Systems. Dr. Sanguinetti holds a Ph.D. in Computer and Communication Sciences from the University of Michigan, Ann Arbor.
ACM will formally recognize Dr. Sanguinetti and the other 2011 Fellows at its annual Awards Banquet in June in San Francisco.