Analysis

Dongbu HiTek licenses EnSilica’s eSi-RISC processor cores

28th January 2011
ES Admin
0
EnSilica, a leading independent provider of front-end IC design services, has announced that Korea’s Dongbu HiTek has licensed the eSi-1600, part of its eSi-RISC family of embedded processor cores. “The eSi-1600 provides a highly optimised solution with both very low gate and cycle counts. The fully integrated processor sub-system, including memories, peripherals and timers, will greatly reduce design and verification time. Furthermore, EnSilica’s flexible licensing model makes the use of eSi-RISC very attractive for cost-sensitive, high volume designs,” said Jinseok Koh, Director of Dongbu HiTek.
Dongbu HiTek, a world leader specialty foundry, chose EnSilica’s eSi-1600 on a cost/performance basis following extensive evaluation against other established, small footprint embedded RISC processors targeted at mixed-signal and SoC applications. Dongbu HiTek’s evaluation benchmarks, which were undertaken using actual application code, showed that EnSilica’s eSi-1600 had a 20% lower gate count than the competition. With the addition of a single custom instruction, which resulted in only a negligible increase in gate count, it was also 36% faster. Additionally, the custom instruction reduced the eSi-1600’s code size, resulting in lower total memory usage.

Dongbu HiTek's decision to adopt the eSi-RISC architecture is yet further evidence that, where cost/performance is important, it has the ability to deliver even against the toughest competition, said Ian Lankshear, Managing Director of EnSilica. Dongbu HiTek's evaluation of the eSi-1600 truly exemplifies its value proposition in delivering exceptional performance.

EnSilica’s eSi-RISC family provides a range of high quality, highly configurable embedded processors that are easy to integrate. The processor subsystem is delivered fully targeted to the customer ASIC technology, thereby reducing the integration effort. eSi-RISC processors provide the flexibility to define a range of hardware functions to optimise the silicon area. On–chip memory requirements are reduced through inter-mixed 16-bit and 32-bit instructions, resulting in good code density without compromising performance. It is the only processor scalable from 16-bits to 32-bits, starting from as low as 8.5k gates. eSi-RISC utilises the industry standard GNU optimising C/C++ compiler and Eclipse IDE for rapid software development, and supports efficient debugging on the target through a JTAG interface and hardware breakpoints. The development suite is common to both 16-bit and 32-bit processors, protecting users’ software investment.

Product Spotlight

Upcoming Events

View all events
Newsletter
Latest global electronics news
© Copyright 2024 Electronic Specifier