Collaboration could pave way for adoption of 3D IC thermocompression bonding

Aiming to increase functionality and performance of next-generation ICs while reducing footprint and power consumption, 3D IC technology involves the stacking of multiple dies into a single device. The technology is key in enabling the next generation of portable electronics, such as smartphones and tablets, which require smaller ICs that consume less power.

One of the key challenges facing 3D IC manufacturing is the development of high-throughput automated process flow for narrow-pitch, high-accuracy die-to-die and die-to-wafer bonding. Flip chip and reflow soldering, which are currently combined for bonding, require lenient bonding accuracy on large bump pitches (around 150-50µm bump pitch). Bump pitches need to further scale down to 40-10µm to realize a sufficiently high performance. This needs high accuracy in bonding within the range of 1-2um @3sigma. Moreover, an automatic process flow is essential for industrial adoption. Thermocompression bonding is a method that enables this high bonding accuracy on narrow bump pitches, although with this comes long cycle times due to temperature and pressure profiles and processing methods which hinder industrial adoption of this technology up to now.

“We are excited to work with a key research center such as imec and leverage its expertise in fine pitch bonding materials and processes to increase the yield and reliability of our equipment ,” commented Richard Blickman, CEO at Besi. “This collaboration will enable us to benchmark our Chameo tool to meet the industrial needs of the semiconductor industry, offering our customers a viable and effective solution for 2.5D/3D IC manufacturing.”