Cadence & ARM launch IP interoperability agreement

Additionally, the agreement grants both companies rights to manufacture test chips containing Cadence IP and ARM IP and to provide development platforms to customers. The ability to test the IP interoperability in silicon, is intended to enable Cadence and ARM to optimise performance and interoperability within SoCs, while accelerating time to market for customers in markets such as mobile, consumer, networking, storage, automotive and the IoT. The IP interoperability agreement covers existing and future ARM Cortex processors, ARM Mali GPUs, ARM CoreLink system IP, ARM Artisan physical IP and ARM POP IP Cadence Design IP.

“This agreement expands upon the successful EDA Technology Access and EDA Subscription Agreements ARM signed with Cadence last year, to further enable our customers’ designs to reach peak performance and power efficiency,” said Pete Hutton, Executive Vice President, ARM. “Extending our collaboration with Cadence to IP interoperability, means we are mutually embracing the increasing importance of optimising the IP systems within SoC designs. By working together closely, we can continue to deliver the key technologies that allow our customers to push the boundaries of innovation.”

“Through expanded collaboration, Cadence and ARM are able to develop and deliver solutions that enable our customers to rapidly design optimised high-performance ARM-based SoCs and speed time to market for complete systems,” said Martin Lund, Senior Vice President, IP Group. “This new agreement allows customers, of both companies, to get to market faster with pre-integrated IP solutions and continue pushing the envelope on low-power and high-performance SoC design.”