ASSET joins PCI-SIG so add-in cards can validate their access to Intel's embedded instrumentation

10th June 2011
Posted By : ES Admin
ASSET joins PCI-SIG so add-in cards can validate their access to Intel's embedded instrumentation
ASSET InterTech has joined the PCI-SIG® and plans to participate in the group's upcoming interoperability workshops. As a result, manufacturers of PCI Express (PCIe) add-in cards (AIC) will be able to validate that their cards interoperate with ASSET's ScanWorks platform for embedded instruments. This ensures that the AIC manufacturer can access Intel®'s embedded instrumentation technology, Interconnect Built-In Self Test (IBIST), because ScanWorks is the only tools environment that supports Intel® IBIST. Interoperability with Intel IBIST is critical to AIC manufacturers because validating, testing and debugging PCIe practically requires compatibility to Intel IBIST.
The PCI-SIG recently released a new version of the PCIe specification, PCIe 3.0, which

doubles the bandwidth of the previous generation to eight gigatransfers per second (GT/s). As a consequence, real-time validation, test and debug using the Intel IBIST embedded instrumentation technology is imperative if a manufacturer is to assure the functionality and quality of its AICs to the fullest. The PCI-SIG is an independent industry consortium that is responsible for maintaining and advancing the PCIe architecture.

The very high speeds and capacitive sensitivities of PCIe Gen3 are rendering the older probe-based intrusive methods of validation, test and debug a thing of the past, said Tim Caffee, ASSET's vice president of board validation. In addition, certain failures on circuit boards may only manifest themselves over time, but by powering up the board and testing it non-intrusively and at-speed, the manufacturer can often detect these problems, repair any faulty circuit boards and alter the manufacturing process accordingly.

The ScanWorks platform is a software-based environment that supports multiple embedded instrumentation validation and test technologies. The cumulative coverage provided by these technologies far exceeds that of legacy intrusive methodologies. The ScanWorks validation, test and debug tools are boundary-scan test (IEEE 1149.1 and 1149.6 JTAG), processor-controlled test (PCT), high-speed I/O validation for the Intel® Architecture (including the 22 nm 2nd generation CoreT processor family) and built-in self test (BIST) based on embedded instruments that conform to the preliminary IEEE P1687 Internal JTAG (IJTAG) standard.

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